Re: [PATCH v6 1/2] dt-binding: pinctrl: Add NPCM8XX pinctrl and GPIO documentation

From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
To: Tomer Maimon <tmaimon77@gmail.com>
Cc: linus.walleij@linaro.org, robh+dt@kernel.org,
	krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org,
	avifishman70@gmail.com, tali.perry1@gmail.com, joel@jms.id.au,
	venture@google.com, yuenn@google.com, benjaminfair@google.com,
	j.neuschaefer@gmx.net, openbmc@lists.ozlabs.org,
	linux-gpio@vger.kernel.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org, Rob Herring <robh@kernel.org>
Subject: Re: [PATCH v6 1/2] dt-binding: pinctrl: Add NPCM8XX pinctrl and GPIO documentation
Date: Mon, 28 Aug 2023 12:39:34 +0200	[thread overview]
Message-ID: <5c0d985a-0492-778c-46b9-80899e52134c@linaro.org> (raw)
In-Reply-To: <c984d558-11b5-d5ea-9819-7641129de584@linaro.org>

On 28/08/2023 12:36, Krzysztof Kozlowski wrote:
> On 28/08/2023 12:26, Tomer Maimon wrote:
>> Hi Krzysztof,
>>
>> Thanks for your comments
>>
>> On Mon, 28 Aug 2023 at 10:10, Krzysztof Kozlowski
>> <krzysztof.kozlowski@linaro.org> wrote:
>>>
>>> On 27/08/2023 22:36, Tomer Maimon wrote:
>>>> Added device tree binding documentation for Nuvoton Arbel BMC NPCM8XX
>>>> pinmux and GPIO controller.
>>>>
>>>> Signed-off-by: Tomer Maimon <tmaimon77@gmail.com>
>>>> Reviewed-by: Rob Herring <robh@kernel.org>
>>>> ---
>>>
>>>
>>>> +  '^pin':
>>>> +    $ref: pincfg-node.yaml#
>>>> +
>>>> +    properties:
>>>> +      pins:
>>>> +        description:
>>>> +          A list of pins to configure in certain ways, such as enabling
>>>> +          debouncing
>>>
>>> What pin names are allowed?
>> Do you mean to describe all the allowed pin items?
>> for example:
>>       items:
>>         pattern:
>> 'GPIO0/IOX1_DI/SMB6C_SDA/SMB18_SDA|GPIO1/IOX1_LD/SMB6C_SCL/SMB18_SCL'
>> or
>>       items:
>>         pattern: '^GPIO([0-9]|[0-9][0-9]|[1-2][0-4][0-9]|25[0-6])$'
>>
>> is good enough?
> 
> Something like this. Whichever is correct.
> 
>>>
>>>> +
>>>> +      bias-disable: true
>>>> +
> 
>>>> +additionalProperties: false
>>>> +
>>>> +examples:
>>>> +  - |
>>>> +    #include <dt-bindings/interrupt-controller/arm-gic.h>
>>>> +    #include <dt-bindings/gpio/gpio.h>
>>>> +
>>>> +    soc {
>>>> +      #address-cells = <2>;
>>>> +      #size-cells = <2>;
>>>> +
>>>> +      pinctrl: pinctrl@f0800260 {
>>>
>>> Nothing improved here. Test your DTS. This is being reported - I checked.
>> what do you suggest since the pinctrl doesn't have a reg parameter,
>> maybe pinctrl: pinctrl@0?
> 
> It has ranges, so yes @0 looks correct here.

Wait, your address according to ranges is 0xf0010000, not 0x0, not
0xf0800260...

> Which leds to second
> question - how pinctrl could have @0? It's already taken by SoC! So your
> DTS here - unit address and ranges - are clearly wrong.
> 
> 
>> BTW, I have run both dt_binding_check and W=1 dtbs_check, and didn't
>> see an issue related to the pinctrl: pinctrl@f0800260, do I need to
>> add another flag to see the issue?
> 
> Did you read my message last time? I said - it's about DTS, not the binding.

Best regards,
Krzysztof