From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-17.3 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,NICE_REPLY_A,SPF_HELO_NONE,SPF_PASS, USER_AGENT_SANE_1 autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id B4346C432BE for ; Tue, 3 Aug 2021 12:05:06 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 9650960EFF for ; Tue, 3 Aug 2021 12:05:06 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235686AbhHCMFP (ORCPT ); Tue, 3 Aug 2021 08:05:15 -0400 Received: from mx08-00178001.pphosted.com ([91.207.212.93]:51292 "EHLO mx07-00178001.pphosted.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S234524AbhHCMFO (ORCPT ); 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Tue, 03 Aug 2021 14:04:46 +0200 Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 6EA9010002A; Tue, 3 Aug 2021 14:04:46 +0200 (CEST) Received: from Webmail-eu.st.com (sfhdag2node3.st.com [10.75.127.6]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id 5FF25220F33; Tue, 3 Aug 2021 14:04:46 +0200 (CEST) Received: from lmecxl0573.lme.st.com (10.75.127.46) by SFHDAG2NODE3.st.com (10.75.127.6) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Tue, 3 Aug 2021 14:04:45 +0200 Subject: Re: [PATCH v3 03/13] ARM: dts: sti: update flexgen compatible within stih410-clock To: Alain Volmat , Rob Herring CC: Arnd Bergmann , , , References: <20210331204228.26107-1-avolmat@me.com> <20210331204228.26107-4-avolmat@me.com> From: Patrice CHOTARD Message-ID: <5c50c236-7bc6-5307-fd9a-a03b3f3512b1@foss.st.com> Date: Tue, 3 Aug 2021 14:04:24 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.11.0 MIME-Version: 1.0 In-Reply-To: <20210331204228.26107-4-avolmat@me.com> Content-Type: text/plain; charset="utf-8" Content-Language: en-US Content-Transfer-Encoding: 7bit X-Originating-IP: [10.75.127.46] X-ClientProxiedBy: SFHDAG2NODE2.st.com (10.75.127.5) To SFHDAG2NODE3.st.com (10.75.127.6) X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.391,18.0.790 definitions=2021-08-03_02:2021-08-03,2021-08-03 signatures=0 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Alain On 3/31/21 10:42 PM, Alain Volmat wrote: > With the introduction of new flexgen compatible within the clk-flexgen > driver, remove the clock-output-names entry from the flexgen nodes > and set the new proper compatible corresponding. > > Signed-off-by: Alain Volmat > --- > arch/arm/boot/dts/stih410-clock.dtsi | 95 ++-------------------------- > 1 file changed, 6 insertions(+), 89 deletions(-) > > diff --git a/arch/arm/boot/dts/stih410-clock.dtsi b/arch/arm/boot/dts/stih410-clock.dtsi > index 81a8c25d7ba5..04b0d7080353 100644 > --- a/arch/arm/boot/dts/stih410-clock.dtsi > +++ b/arch/arm/boot/dts/stih410-clock.dtsi > @@ -83,16 +83,12 @@ > }; > > clk_s_a0_flexgen: clk-s-a0-flexgen { > - compatible = "st,flexgen"; > + compatible = "st,flexgen", "st,flexgen-stih410-a0"; > > #clock-cells = <1>; > > clocks = <&clk_s_a0_pll 0>, > <&clk_sysin>; > - > - clock-output-names = "clk-ic-lmi0", > - "clk-ic-lmi1"; > - clock-critical = ; > }; > }; > > @@ -135,7 +131,7 @@ > > clk_s_c0_flexgen: clk-s-c0-flexgen { > #clock-cells = <1>; > - compatible = "st,flexgen"; > + compatible = "st,flexgen", "st,flexgen-stih410-c0"; > > clocks = <&clk_s_c0_pll0 0>, > <&clk_s_c0_pll1 0>, > @@ -145,52 +141,6 @@ > <&clk_s_c0_quadfs 3>, > <&clk_sysin>; > > - clock-output-names = "clk-icn-gpu", > - "clk-fdma", > - "clk-nand", > - "clk-hva", > - "clk-proc-stfe", > - "clk-proc-tp", > - "clk-rx-icn-dmu", > - "clk-rx-icn-hva", > - "clk-icn-cpu", > - "clk-tx-icn-dmu", > - "clk-mmc-0", > - "clk-mmc-1", > - "clk-jpegdec", > - "clk-ext2fa9", > - "clk-ic-bdisp-0", > - "clk-ic-bdisp-1", > - "clk-pp-dmu", > - "clk-vid-dmu", > - "clk-dss-lpc", > - "clk-st231-aud-0", > - "clk-st231-gp-1", > - "clk-st231-dmu", > - "clk-icn-lmi", > - "clk-tx-icn-disp-1", > - "clk-icn-sbc", > - "clk-stfe-frc2", > - "clk-eth-phy", > - "clk-eth-ref-phyclk", > - "clk-flash-promip", > - "clk-main-disp", > - "clk-aux-disp", > - "clk-compo-dvp", > - "clk-tx-icn-hades", > - "clk-rx-icn-hades", > - "clk-icn-reg-16", > - "clk-pp-hades", > - "clk-clust-hades", > - "clk-hwpe-hades", > - "clk-fc-hades"; > - clock-critical = , > - , > - , > - , > - , > - ; > - > /* > * ARM Peripheral clock for timers > */ > @@ -227,20 +177,13 @@ > > clk_s_d0_flexgen: clk-s-d0-flexgen { > #clock-cells = <1>; > - compatible = "st,flexgen-audio", "st,flexgen"; > + compatible = "st,flexgen", "st,flexgen-stih410-d0"; > > clocks = <&clk_s_d0_quadfs 0>, > <&clk_s_d0_quadfs 1>, > <&clk_s_d0_quadfs 2>, > <&clk_s_d0_quadfs 3>, > <&clk_sysin>; > - > - clock-output-names = "clk-pcm-0", > - "clk-pcm-1", > - "clk-pcm-2", > - "clk-spdiff", > - "clk-pcmr10-master", > - "clk-usb2-phy"; > }; > }; > > @@ -263,7 +206,7 @@ > > clk_s_d2_flexgen: clk-s-d2-flexgen { > #clock-cells = <1>; > - compatible = "st,flexgen-video", "st,flexgen"; > + compatible = "st,flexgen", "st,flexgen-stih407-d2"; > > clocks = <&clk_s_d2_quadfs 0>, > <&clk_s_d2_quadfs 1>, > @@ -272,24 +215,7 @@ > <&clk_sysin>, > <&clk_sysin>, > <&clk_tmdsout_hdmi>; > - > - clock-output-names = "clk-pix-main-disp", > - "clk-pix-pip", > - "clk-pix-gdp1", > - "clk-pix-gdp2", > - "clk-pix-gdp3", > - "clk-pix-gdp4", > - "clk-pix-aux-disp", > - "clk-denc", > - "clk-pix-hddac", > - "clk-hddac", > - "clk-sddac", > - "clk-pix-dvo", > - "clk-dvo", > - "clk-pix-hdmi", > - "clk-tmds-hdmi", > - "clk-ref-hdmiphy"; > - }; > + }; > }; > > clk_s_d3_quadfs: clk-s-d3-quadfs@9107000 { > @@ -311,22 +237,13 @@ > > clk_s_d3_flexgen: clk-s-d3-flexgen { > #clock-cells = <1>; > - compatible = "st,flexgen"; > + compatible = "st,flexgen", "st,flexgen-stih407-d3"; > > clocks = <&clk_s_d3_quadfs 0>, > <&clk_s_d3_quadfs 1>, > <&clk_s_d3_quadfs 2>, > <&clk_s_d3_quadfs 3>, > <&clk_sysin>; > - > - clock-output-names = "clk-stfe-frc1", > - "clk-tsout-0", > - "clk-tsout-1", > - "clk-mchi", > - "clk-vsens-compo", > - "clk-frc1-remote", > - "clk-lpc-0", > - "clk-lpc-1"; > }; > }; > }; > Reviewed-by: Patrice Chotard Thanks Patrice