From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756075AbdC2NIi (ORCPT ); Wed, 29 Mar 2017 09:08:38 -0400 Received: from mga02.intel.com ([134.134.136.20]:22194 "EHLO mga02.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755818AbdC2NIh (ORCPT ); Wed, 29 Mar 2017 09:08:37 -0400 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.36,241,1486454400"; d="scan'208";a="1113275244" Subject: Re: [v5 1/4] mmc: sdhci-cadence: Fix writing PHY delay To: Piotr Sroka , linux-mmc@vger.kernel.org References: <1490106736-2242-1-git-send-email-piotrs@cadence.com> Cc: Ulf Hansson , linux-kernel@vger.kernel.org, Masahiro Yamada From: Adrian Hunter Organization: Intel Finland Oy, Registered Address: PL 281, 00181 Helsinki, Business Identity Code: 0357606 - 4, Domiciled in Helsinki Message-ID: <5c89e38f-daa2-1c70-084f-2046d1f4f986@intel.com> Date: Wed, 29 Mar 2017 16:03:00 +0300 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:45.0) Gecko/20100101 Thunderbird/45.7.0 MIME-Version: 1.0 In-Reply-To: <1490106736-2242-1-git-send-email-piotrs@cadence.com> Content-Type: text/plain; charset=windows-1252 Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 21/03/17 16:32, Piotr Sroka wrote: > Add polling for ACK to be sure that data are written to PHY register. > > Signed-off-by: Piotr Sroka Acked-by: Adrian Hunter > --- > Changes for v2: > - fix indent > --- > Changes for v3: > - none > --- > Changes for v4: > - none > --- > Changes for v5: > - use driver version from next branch, with applied enhanced strobe feature support. > --- > drivers/mmc/host/sdhci-cadence.c | 11 +++++++++-- > 1 file changed, 9 insertions(+), 2 deletions(-) > > diff --git a/drivers/mmc/host/sdhci-cadence.c b/drivers/mmc/host/sdhci-cadence.c > index 48f6419..83c3b55 100644 > --- a/drivers/mmc/host/sdhci-cadence.c > +++ b/drivers/mmc/host/sdhci-cadence.c > @@ -68,11 +68,12 @@ struct sdhci_cdns_priv { > bool enhanced_strobe; > }; > > -static void sdhci_cdns_write_phy_reg(struct sdhci_cdns_priv *priv, > - u8 addr, u8 data) > +static int sdhci_cdns_write_phy_reg(struct sdhci_cdns_priv *priv, > + u8 addr, u8 data) > { > void __iomem *reg = priv->hrs_addr + SDHCI_CDNS_HRS04; > u32 tmp; > + int ret; > > tmp = (data << SDHCI_CDNS_HRS04_WDATA_SHIFT) | > (addr << SDHCI_CDNS_HRS04_ADDR_SHIFT); > @@ -81,8 +82,14 @@ static void sdhci_cdns_write_phy_reg(struct sdhci_cdns_priv *priv, > tmp |= SDHCI_CDNS_HRS04_WR; > writel(tmp, reg); > > + ret = readl_poll_timeout(reg, tmp, tmp & SDHCI_CDNS_HRS04_ACK, 0, 10); > + if (ret) > + return ret; > + > tmp &= ~SDHCI_CDNS_HRS04_WR; > writel(tmp, reg); > + > + return 0; > } > > static void sdhci_cdns_phy_init(struct sdhci_cdns_priv *priv) >