From: Matthias Brugger <matthias.bgg@gmail.com>
To: Ryder Lee <ryder.lee@mediatek.com>, Rob Herring <robh+dt@kernel.org>
Cc: Sean Wang <sean.wang@mediatek.com>,
Roy Luo <cheng-hao.luo@mediatek.com>,
Weijie Gao <weijie.gao@mediatek.com>,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-mediatek@lists.infradead.org
Subject: Re: [PATCH v1 1/5] arm64: dts: mt7622: add timer, CCI-400 and PMU nodes
Date: Tue, 25 Sep 2018 17:10:02 +0200 [thread overview]
Message-ID: <5cd2bf92-251d-7a48-5bb0-95060d6ccb51@gmail.com> (raw)
In-Reply-To: <7d3ce6a89ffeb221dc3197b763521582bf300577.1534607107.git.ryder.lee@mediatek.com>
Whole series pushed to v4.19-next/dts64
Thanks!
On 18/08/2018 18:02, Ryder Lee wrote:
> Add device tree entries for timer, ARM CCI-400 and its PMU.
> Otherwise, we add a cortex-a53-pmu node to enable hw perfevents.
>
> Signed-off-by: Ryder Lee <ryder.lee@mediatek.com>
> ---
> change since v1:
> - add a pmu node.
> ---
> arch/arm64/boot/dts/mediatek/mt7622.dtsi | 55 ++++++++++++++++++++++++++++++++
> 1 file changed, 55 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/mediatek/mt7622.dtsi b/arch/arm64/boot/dts/mediatek/mt7622.dtsi
> index de2c47bd..d297100 100644
> --- a/arch/arm64/boot/dts/mediatek/mt7622.dtsi
> +++ b/arch/arm64/boot/dts/mediatek/mt7622.dtsi
> @@ -79,6 +79,7 @@
> #cooling-cells = <2>;
> enable-method = "psci";
> clock-frequency = <1300000000>;
> + cci-control-port = <&cci_control2>;
> };
>
> cpu1: cpu@1 {
> @@ -92,6 +93,7 @@
> #cooling-cells = <2>;
> enable-method = "psci";
> clock-frequency = <1300000000>;
> + cci-control-port = <&cci_control2>;
> };
> };
>
> @@ -113,6 +115,13 @@
> method = "smc";
> };
>
> + pmu {
> + compatible = "arm,cortex-a53-pmu";
> + interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_LOW>,
> + <GIC_SPI 9 IRQ_TYPE_LEVEL_LOW>;
> + interrupt-affinity = <&cpu0>, <&cpu1>;
> + };
> +
> reserved-memory {
> #address-cells = <2>;
> #size-cells = <2>;
> @@ -218,6 +227,16 @@
> #reset-cells = <1>;
> };
>
> + timer: timer@10004000 {
> + compatible = "mediatek,mt7622-timer",
> + "mediatek,mt6577-timer";
> + reg = <0 0x10004000 0 0x80>;
> + interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_LOW>;
> + clocks = <&infracfg CLK_INFRA_APXGPT_PD>,
> + <&topckgen CLK_TOP_RTC>;
> + clock-names = "system-clk", "rtc-clk";
> + };
> +
> scpsys: scpsys@10006000 {
> compatible = "mediatek,mt7622-scpsys",
> "syscon";
> @@ -325,6 +344,42 @@
> <0 0x10360000 0 0x2000>;
> };
>
> + cci: cci@10390000 {
> + compatible = "arm,cci-400";
> + #address-cells = <1>;
> + #size-cells = <1>;
> + reg = <0 0x10390000 0 0x1000>;
> + ranges = <0 0 0x10390000 0x10000>;
> +
> + cci_control0: slave-if@1000 {
> + compatible = "arm,cci-400-ctrl-if";
> + interface-type = "ace-lite";
> + reg = <0x1000 0x1000>;
> + };
> +
> + cci_control1: slave-if@4000 {
> + compatible = "arm,cci-400-ctrl-if";
> + interface-type = "ace";
> + reg = <0x4000 0x1000>;
> + };
> +
> + cci_control2: slave-if@5000 {
> + compatible = "arm,cci-400-ctrl-if";
> + interface-type = "ace";
> + reg = <0x5000 0x1000>;
> + };
> +
> + pmu@9000 {
> + compatible = "arm,cci-400-pmu,r1";
> + reg = <0x9000 0x5000>;
> + interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
> + };
> + };
> +
> auxadc: adc@11001000 {
> compatible = "mediatek,mt7622-auxadc";
> reg = <0 0x11001000 0 0x1000>;
>
prev parent reply other threads:[~2018-09-25 15:10 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-08-18 16:02 [PATCH v1 1/5] arm64: dts: mt7622: add timer, CCI-400 and PMU nodes Ryder Lee
2018-08-18 16:02 ` [PATCH v1 2/5] arm64: dts: mt7622: add a bluetooth 5 device node Ryder Lee
2018-08-18 16:02 ` [PATCH v1 3/5] arm64: dts: mt7622: fix ram size for rfb1 Ryder Lee
2018-08-18 16:02 ` [PATCH v1 4/5] arm64: dts: mt7622: add bananapi BPI-R64 board Ryder Lee
2018-08-18 16:02 ` [PATCH v1 5/5] dt-bindings: arm: mediatek: add support for " Ryder Lee
2018-09-25 15:10 ` Matthias Brugger [this message]
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=5cd2bf92-251d-7a48-5bb0-95060d6ccb51@gmail.com \
--to=matthias.bgg@gmail.com \
--cc=cheng-hao.luo@mediatek.com \
--cc=devicetree@vger.kernel.org \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-mediatek@lists.infradead.org \
--cc=robh+dt@kernel.org \
--cc=ryder.lee@mediatek.com \
--cc=sean.wang@mediatek.com \
--cc=weijie.gao@mediatek.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).