From: Stephen Boyd <swboyd@chromium.org>
To: Lina Iyer <ilina@codeaurora.org>,
evgreen@chromium.org, linus.walleij@linaro.org,
marc.zyngier@arm.com
Cc: linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org,
bjorn.andersson@linaro.org, mkshah@codeaurora.org,
linux-gpio@vger.kernel.org, rnayak@codeaurora.org,
Lina Iyer <ilina@codeaurora.org>
Subject: Re: [PATCH RFC 02/14] drivers: irqchip: pdc: Do not toggle IRQ_ENABLE during mask/unmask
Date: Thu, 05 Sep 2019 17:39:52 -0700 [thread overview]
Message-ID: <5d71aad9.1c69fb81.f469e.262f@mx.google.com> (raw)
In-Reply-To: <20190829181203.2660-3-ilina@codeaurora.org>
Quoting Lina Iyer (2019-08-29 11:11:51)
> When an interrupt is to be serviced, the convention is to mask the
> interrupt at the chip and unmask after servicing the interrupt. Enabling
> and disabling the interrupt at the PDC irqchip causes an interrupt storm
> due to the way dual edge interrupts are handled in hardware.
>
> Skip configuring the PDC when the IRQ is masked and unmasked, instead
> use the irq_enable/irq_disable callbacks to toggle the IRQ_ENABLE
> register at the PDC. The PDC's IRQ_ENABLE register is only used during
> the monitoring mode when the system is asleep and is not needed for
> active mode detection.
I think this is saying that we want to always let the line be sent
through the PDC to the parent irqchip, in this case GIC, so that we
don't get an interrupt storm for dual edge interrupts? Why does dual
edge interrupts cause a problem?
>
> Signed-off-by: Lina Iyer <ilina@codeaurora.org>
next prev parent reply other threads:[~2019-09-06 0:39 UTC|newest]
Thread overview: 41+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-08-29 18:11 [PATCH RFC 00/14] qcom: support wakeup capable GPIOs Lina Iyer
2019-08-29 18:11 ` [PATCH RFC 01/14] irqdomain: add bus token DOMAIN_BUS_WAKEUP Lina Iyer
2019-08-29 18:11 ` [PATCH RFC 02/14] drivers: irqchip: pdc: Do not toggle IRQ_ENABLE during mask/unmask Lina Iyer
2019-09-06 0:39 ` Stephen Boyd [this message]
2019-09-11 16:15 ` Lina Iyer
2019-09-20 22:22 ` Stephen Boyd
2019-09-20 22:31 ` Lina Iyer
2019-08-29 18:11 ` [PATCH RFC 03/14] drivers: irqchip: add PDC irqdomain for wakeup capable GPIOs Lina Iyer
2019-08-30 14:50 ` Marc Zyngier
2019-08-30 15:58 ` Lina Iyer
2019-09-02 8:21 ` Marc Zyngier
2019-09-03 22:51 ` Stephen Boyd
2019-08-29 18:11 ` [PATCH RFC 04/14] of: irq: document properties for wakeup interrupt parent Lina Iyer
2019-09-02 13:38 ` Rob Herring
2019-08-29 18:11 ` [PATCH RFC 05/14] dt-bindings/interrupt-controller: pdc: add SPI config register Lina Iyer
2019-09-02 13:38 ` Rob Herring
2019-09-02 13:53 ` Marc Zyngier
2019-09-03 17:07 ` Lina Iyer
2019-09-06 0:03 ` Stephen Boyd
2019-09-13 19:53 ` Lina Iyer
2019-09-17 21:50 ` Lina Iyer
2019-09-20 22:20 ` Stephen Boyd
2019-09-23 6:11 ` Sibi Sankar
[not found] ` <CACRpkdaReFzjb_hcDbQwqMX+whzscLpeZpJPHKqOo+9tANzemA@mail.gmail.com>
2019-09-11 15:19 ` Lina Iyer
2019-08-29 18:11 ` [PATCH RFC 06/14] drivers: irqchip: pdc: additionally set type in SPI config registers Lina Iyer
2019-09-06 0:22 ` Stephen Boyd
2019-08-29 18:11 ` [PATCH RFC 07/14] genirq: Introduce irq_chip_get/set_parent_state calls Lina Iyer
2019-09-06 0:35 ` Stephen Boyd
2019-08-29 18:11 ` [PATCH RFC 08/14] drivers: irqchip: pdc: Add irqchip set/get state calls Lina Iyer
2019-09-06 0:09 ` Stephen Boyd
2019-08-29 18:11 ` [PATCH RFC 09/14] drivers: pinctrl: msm: fix use of deprecated gpiolib APIs Lina Iyer
2019-09-06 0:11 ` Stephen Boyd
2019-09-11 10:19 ` Linus Walleij
2019-09-11 16:16 ` Lina Iyer
2019-08-29 18:11 ` [PATCH RFC 10/14] drivers: pinctrl: msm: setup GPIO chip in hierarchy Lina Iyer
2019-08-29 18:12 ` [PATCH RFC 11/14] drivers: pinctrl: sdm845: add PDC wakeup interrupt map for GPIOs Lina Iyer
2019-09-06 0:24 ` Stephen Boyd
2019-08-29 18:12 ` [PATCH RFC 12/14] arm64: dts: qcom: add PDC interrupt controller for SDM845 Lina Iyer
2019-09-09 11:26 ` Maulik Shah
2019-08-29 18:12 ` [PATCH RFC 13/14] arm64: dts: qcom: setup PDC as the wakeup parent for TLMM on SDM845 Lina Iyer
2019-08-29 18:12 ` [PATCH RFC 14/14] arm64: defconfig: enable PDC interrupt controller for Qualcomm SDM845 Lina Iyer
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