From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id E98B5C433B4 for ; Wed, 21 Apr 2021 14:14:40 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id CE61461445 for ; Wed, 21 Apr 2021 14:14:40 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S243333AbhDUOPL (ORCPT ); Wed, 21 Apr 2021 10:15:11 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:54412 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236743AbhDUOPF (ORCPT ); Wed, 21 Apr 2021 10:15:05 -0400 Received: from mail-qk1-x732.google.com (mail-qk1-x732.google.com [IPv6:2607:f8b0:4864:20::732]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id EE7DAC06174A; Wed, 21 Apr 2021 07:14:30 -0700 (PDT) Received: by mail-qk1-x732.google.com with SMTP id q136so21935722qka.7; Wed, 21 Apr 2021 07:14:30 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=message-id:subject:from:to:cc:date:in-reply-to:references :organization:user-agent:mime-version:content-transfer-encoding; bh=H0xUL+VFdyIa0ji4Th/5YMGTFHYr1jkOK9wBOItrp/Y=; b=Htq4AavTUvaIKjrSwYSgfk/9LOhsOQRau62GNNkBD79Sh4VxHePzD2L+B52RENCsHI 4PL+nqqx70rsT6DneonIWLk2JgIAAKH4RYpwmo9Wn4GDqdmpAlfpjtk7jRllYJmXZiyo tnWbbNT+p3igXVTAx/jBF1NGPsOxeu1AmVb87QTHjEKTdSc2O7Jo3LKCuXXR0KpW4+Bg RW9awX3klxF+hBslxw/CUl5QEoKtY33EQ/HmP0wx4EJ0xHnjRpqiBjFbzcGxBnN5SQYr KgFfi77SLsFAOdNhi6+68ezGqnlxjq1tZBqUtfj/RhDFkEwEa14TQvGCRvorbKiVdznv Pi9A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:message-id:subject:from:to:cc:date:in-reply-to :references:organization:user-agent:mime-version :content-transfer-encoding; bh=H0xUL+VFdyIa0ji4Th/5YMGTFHYr1jkOK9wBOItrp/Y=; b=BcCnbKgSX+9JiOELj0lrxdNt7av1PMyExWtdW2rZo89dYSMsVNTvCQjq+fjnknYpaz 0+oio0U8DoiIoXaQhNylUwR9J7x4zLZwRH+N5RQZ0xjchC+qkhtutQLivuAcJrGxteju W+RJfAIQLHGrIPidehikS6wFOQCU2wrsuPYchBVfWSb5QcN0NGqk01OkJ8+EN1uLI7ZE llyXQTiHWU3AG+r8Ru+Bm5+k3+3UP8fdCTL1VKDDfrpt2bttZY4SAB2sgx2A0ql+9JeL XLSr61FeUYrajZP3BJ9HnyCSiYznZaKMRJqovwkrRkI2h/vp2sIHrsKLG+aS5B56cXWq gRMg== X-Gm-Message-State: AOAM532YjNp+LV96fyjnYWaS1iAaC2FjC9wHGBNeZEQ6zImoLPIxL70P PZS2/OBwXmZon3htt+qjtp4= X-Google-Smtp-Source: ABdhPJw8CLguVFAPzF8l1/1q5ENNtjHkvPtfqw/PekYFKdTDnJWRL0D+IoF3dUIZdep6LDU4L/VqjQ== X-Received: by 2002:a37:a5d6:: with SMTP id o205mr11119679qke.166.1619014469882; Wed, 21 Apr 2021 07:14:29 -0700 (PDT) Received: from li-908e0a4c-2250-11b2-a85c-f027e903211b.ibm.com ([177.35.200.187]) by smtp.gmail.com with ESMTPSA id o12sm2150348qkg.36.2021.04.21.07.14.26 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 21 Apr 2021 07:14:29 -0700 (PDT) Message-ID: <5da23b1199c897b464c7bf7027ac50057d1cb5b6.camel@gmail.com> Subject: Re: [PATCH 1/1] of/pci: Add IORESOURCE_MEM_64 to resource flags for 64-bit memory addresses From: Leonardo Bras To: Rob Herring Cc: Frank Rowand , Alexey Kardashevskiy , devicetree@vger.kernel.org, "linux-kernel@vger.kernel.org" , PCI , linuxppc-dev Date: Wed, 21 Apr 2021 11:14:25 -0300 In-Reply-To: References: <20210415180050.373791-1-leobras.c@gmail.com> <7b089cd48b90f2445c7cb80da1ce8638607c46fc.camel@gmail.com> Organization: IBM Content-Type: text/plain; charset="UTF-8" User-Agent: Evolution 3.38.4 (3.38.4-1.fc33) MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, 2021-04-20 at 17:34 -0500, Rob Herring wrote: > > [...] > > I think the point here is bus resources not getting the MEM_64 flag, > > but device resources getting it correctly. Is that supposed to happen? > > I experimented with this on Arm with qemu and it seems fine there too. > Looks like the BARs are first read and will have bit 2 set by default > (or hardwired?). Now I'm just wondering why powerpc needs the code it > has... > > Anyways, I'll apply the patch. > > Rob Thanks Rob!