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spf=none smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728135AbeILO7A (ORCPT ); Wed, 12 Sep 2018 10:59:00 -0400 Received: from mail-ed1-f68.google.com ([209.85.208.68]:41400 "EHLO mail-ed1-f68.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727419AbeILO7A (ORCPT ); Wed, 12 Sep 2018 10:59:00 -0400 Received: by mail-ed1-f68.google.com with SMTP id f38-v6so1247422edd.8 for ; Wed, 12 Sep 2018 02:55:11 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :in-reply-to:references; bh=EUb5THd3UgJ5IPuekl8cUMvWQfdVuvfo2LR1O6+VsP4=; b=OiDQlIRb480dd4F72aX++iRYaxcsdd0KKt1rtjnU/ij1Rz/uxTpycMPaf+MZk9KSX1 P1rvdNEPrAOAJyVncXIgCIzxUYDhaOak0ZNcMJVFIENsv7QqiiYeWT5FG88ExBNpvpq4 bzuqvXOwEKgvd5icCivy/7cWN9AJjHQwXjnFI= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:in-reply-to:references; bh=EUb5THd3UgJ5IPuekl8cUMvWQfdVuvfo2LR1O6+VsP4=; b=cUL1GqeIKau/qjRs2gBeP3yyhqfzPNty9wdJM/e9aTMwwD4geplbTKBsw9zBxEXzSp uqwHp06Wq0NAEZIYvHT1wEiubk+DqTJTuyuel86l2RiMWxaWak5KDFW1h5oKw+Wf2KXK nPr1ASIhXo3a7SNLYNuVwYvDdruZASMipb8UualXcvcWY47zNMcYncqkpL/MdAV15qiH yEvMoXsGd3+p6uVqf6gkNLuV0CZZocVo0g6IAf42UdIaPosDFbGtFVDUg64OmtWlv6QW Nm6FC9mx2MYg6IRappWbDR+xSRUBlnQDSiPaHwVMpNI1rMYdSK19jNmyN0+E5iJMBcxv OtFw== X-Gm-Message-State: APzg51AdfcOs2hT5M7nREHKeCz+VVRy30P80pzaiN4Y9cxZDxc6MSRtz kVMRpGfTqdU1kpeL6hVOXbYRsJB8np4= X-Google-Smtp-Source: ANB0VdYqwCvKh7H6ASSrDn01L8C7YReyUJmXJUjw2re/Scl+iAzCyCU+dN5VytmM/IM2FP4g9hPoRA== X-Received: by 2002:a50:cf42:: with SMTP id d2-v6mr1856096edk.242.1536746110735; Wed, 12 Sep 2018 02:55:10 -0700 (PDT) Received: from localhost ([49.248.190.214]) by smtp.gmail.com with ESMTPSA id i15-v6sm439968ede.66.2018.09.12.02.55.08 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Wed, 12 Sep 2018 02:55:09 -0700 (PDT) From: Amit Kucheria To: linux-kernel@vger.kernel.org Cc: rnayak@codeaurora.org, linux-arm-msm@vger.kernel.org, bjorn.andersson@linaro.org, edubezval@gmail.com, smohanad@codeaurora.org, andy.gross@linaro.org, dianders@chromium.org, mka@chromium.org, David Brown , Rob Herring , Mark Rutland , linux-soc@vger.kernel.org, devicetree@vger.kernel.org Subject: [PATCH v3 16/16] arm64: dts: sdm845: enable tsens thermal zones Date: Wed, 12 Sep 2018 15:23:01 +0530 Message-Id: <5e2d5fc463a5f5623c4fc1b18ccdf62adc954758.1536744310.git.amit.kucheria@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: References: In-Reply-To: References: Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org One thermal zone per cpu is defined Signed-off-by: Amit Kucheria Reviewed-by: Matthias Kaehlcke Tested-by: Matthias Kaehlcke --- arch/arm64/boot/dts/qcom/sdm845.dtsi | 170 +++++++++++++++++++++++++++ 1 file changed, 170 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi index 0c9a2aa6a1b5..eb801922f6bb 100644 --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi @@ -1104,4 +1104,174 @@ }; }; }; + + thermal-zones { + cpu0-thermal { + polling-delay-passive = <250>; + polling-delay = <1000>; + + thermal-sensors = <&tsens0 1>; + + trips { + cpu_alert0: trip0 { + temperature = <75000>; + hysteresis = <2000>; + type = "passive"; + }; + + cpu_crit0: trip1 { + temperature = <110000>; + hysteresis = <1000>; + type = "critical"; + }; + }; + }; + + cpu1-thermal { + polling-delay-passive = <250>; + polling-delay = <1000>; + + thermal-sensors = <&tsens0 2>; + + trips { + cpu_alert1: trip0 { + temperature = <75000>; + hysteresis = <2000>; + type = "passive"; + }; + + cpu_crit1: trip1 { + temperature = <110000>; + hysteresis = <1000>; + type = "critical"; + }; + }; + }; + + cpu2-thermal { + polling-delay-passive = <250>; + polling-delay = <1000>; + + thermal-sensors = <&tsens0 3>; + + trips { + cpu_alert2: trip0 { + temperature = <75000>; + hysteresis = <2000>; + type = "passive"; + }; + + cpu_crit2: trip1 { + temperature = <110000>; + hysteresis = <1000>; + type = "critical"; + }; + }; + }; + + cpu3-thermal { + polling-delay-passive = <250>; + polling-delay = <1000>; + + thermal-sensors = <&tsens0 4>; + + trips { + cpu_alert3: trip0 { + temperature = <75000>; + hysteresis = <2000>; + type = "passive"; + }; + + cpu_crit3: trip1 { + temperature = <110000>; + hysteresis = <1000>; + type = "critical"; + }; + }; + }; + + cpu4-thermal { + polling-delay-passive = <250>; + polling-delay = <1000>; + + thermal-sensors = <&tsens0 7>; + + trips { + cpu_alert4: trip0 { + temperature = <75000>; + hysteresis = <2000>; + type = "passive"; + }; + + cpu_crit4: trip1 { + temperature = <110000>; + hysteresis = <1000>; + type = "critical"; + }; + }; + }; + + cpu5-thermal { + polling-delay-passive = <250>; + polling-delay = <1000>; + + thermal-sensors = <&tsens0 8>; + + trips { + cpu_alert5: trip0 { + temperature = <75000>; + hysteresis = <2000>; + type = "passive"; + }; + + cpu_crit5: trip1 { + temperature = <110000>; + hysteresis = <1000>; + type = "critical"; + }; + }; + }; + + cpu6-thermal { + polling-delay-passive = <250>; + polling-delay = <1000>; + + thermal-sensors = <&tsens0 9>; + + trips { + cpu_alert6: trip0 { + temperature = <75000>; + hysteresis = <2000>; + type = "passive"; + }; + + cpu_crit6: trip1 { + temperature = <110000>; + hysteresis = <1000>; + type = "critical"; + }; + }; + }; + + cpu7-thermal { + polling-delay-passive = <250>; + polling-delay = <1000>; + + thermal-sensors = <&tsens0 10>; + + trips { + cpu_alert7: trip0 { + temperature = <75000>; + hysteresis = <2000>; + type = "passive"; + }; + + cpu_crit7: trip1 { + temperature = <110000>; + hysteresis = <1000>; + type = "critical"; + }; + }; + }; + }; }; -- 2.17.1