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Fri, 17 Sep 2021 09:47:37 +0000 Received: from DRHQMAIL107.nvidia.com (10.27.9.16) by HQMAIL109.nvidia.com (172.20.187.15) with Microsoft SMTP Server (TLS) id 15.0.1497.18; Fri, 17 Sep 2021 02:47:37 -0700 Received: from [10.26.49.12] (172.20.187.6) by DRHQMAIL107.nvidia.com (10.27.9.16) with Microsoft SMTP Server (TLS) id 15.0.1497.18; Fri, 17 Sep 2021 09:47:35 +0000 Subject: Re: [RESEND PATCH 2/3] dmaengine: tegra210-adma: Add description for 'adma_get_burst_config' To: Sameer Pujar , , , CC: , , References: <1631722025-19873-1-git-send-email-spujar@nvidia.com> <1631722025-19873-3-git-send-email-spujar@nvidia.com> From: Jon Hunter Message-ID: <5eb80e74-f147-42ec-e757-d29008a4e796@nvidia.com> Date: Fri, 17 Sep 2021 10:47:33 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.13.0 MIME-Version: 1.0 In-Reply-To: <1631722025-19873-3-git-send-email-spujar@nvidia.com> Content-Type: text/plain; charset="utf-8"; format=flowed Content-Language: en-US Content-Transfer-Encoding: 7bit X-Originating-IP: [172.20.187.6] X-ClientProxiedBy: HQMAIL101.nvidia.com (172.20.187.10) To DRHQMAIL107.nvidia.com (10.27.9.16) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 9a9b12ab-4376-4a82-3215-08d979c02f2c X-MS-TrafficTypeDiagnostic: MN2PR12MB4519: X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:2089; 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X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 17 Sep 2021 09:47:37.9234 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 9a9b12ab-4376-4a82-3215-08d979c02f2c X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.112.32];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: DM6NAM11FT058.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MN2PR12MB4519 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 15/09/2021 17:07, Sameer Pujar wrote: > Trivial change to add description for 'adma_get_burst_config' in chip > data structure. > > Fixes: 433de642a76c ("dmaengine: tegra210-adma: add support for Tegra186/Tegra194") > Signed-off-by: Sameer Pujar > --- > drivers/dma/tegra210-adma.c | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/drivers/dma/tegra210-adma.c b/drivers/dma/tegra210-adma.c > index caf200e..03f9776 100644 > --- a/drivers/dma/tegra210-adma.c > +++ b/drivers/dma/tegra210-adma.c > @@ -73,6 +73,7 @@ struct tegra_adma; > > /* > * struct tegra_adma_chip_data - Tegra chip specific data > + * @adma_get_burst_config: Function callback used to set DMA burst size. > * @global_reg_offset: Register offset of DMA global register. > * @global_int_clear: Register offset of DMA global interrupt clear. > * @ch_req_tx_shift: Register offset for AHUB transmit channel select. > Reviewed-by: Jon Hunter Cheers Jon -- nvpublic