From: Chanwoo Choi <cw00.choi@samsung.com>
To: "Artur Świgoń" <a.swigon@samsung.com>,
devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-samsung-soc@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-pm@vger.kernel.org, dri-devel@lists.freedesktop.org
Cc: myungjoo.ham@samsung.com, inki.dae@samsung.com,
sw0312.kim@samsung.com, georgi.djakov@linaro.org,
leonard.crestez@nxp.com, m.szyprowski@samsung.com,
b.zolnierkie@samsung.com, krzk@kernel.org
Subject: Re: [RFC PATCH v2 08/11] arm: dts: exynos: Add parents and #interconnect-cells to Exynos4412
Date: Mon, 16 Dec 2019 09:57:05 +0900 [thread overview]
Message-ID: <61a0b84c-9154-81f6-717c-b0b684b98830@samsung.com> (raw)
In-Reply-To: <f0453b39-fd05-9824-ee24-39b6bd587876@samsung.com>
Hi,
Please ignore second reply. It is my mistake
to send the duplicate message because of my company firewall issue.
Regards,
Chanwoo Choi
On 12/16/19 9:55 AM, Chanwoo Choi wrote:
> Hi,
>
> On 9/19/19 11:22 PM, Artur Świgoń wrote:
>> From: Artur Świgoń <a.swigon@partner.samsung.com>
>>
>> This patch adds two fields to the Exynos4412 DTS:
>> - parent: to declare connections between nodes that are not in a
>> parent-child relation in devfreq;
>> - #interconnect-cells: required by the interconnect framework.
>>
>> Please note that #interconnect-cells is always zero and node IDs are not
>> hardcoded anywhere. The above-mentioned parent-child relation in devfreq
>> means that there is a shared power line ('devfreq' property). The 'parent'
>> property only signifies an interconnect connection.
>>
>> Signed-off-by: Artur Świgoń <a.swigon@partner.samsung.com>
>> ---
>> arch/arm/boot/dts/exynos4412-odroid-common.dtsi | 1 +
>> arch/arm/boot/dts/exynos4412.dtsi | 9 +++++++++
>> 2 files changed, 10 insertions(+)
>>
>> diff --git a/arch/arm/boot/dts/exynos4412-odroid-common.dtsi b/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
>> index ea55f377d17c..bdd61ae86103 100644
>> --- a/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
>> +++ b/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
>> @@ -106,6 +106,7 @@
>> &bus_leftbus {
>> devfreq-events = <&ppmu_leftbus_3>, <&ppmu_rightbus_3>;
>> vdd-supply = <&buck3_reg>;
>> + parent = <&bus_dmc>;
>
> As I mentioned on other patch,
> I'm not sure to use 'parent' property for this driver.
> If possible, we better to use the standard way like OF graph
> in order to make the tree between buses. Except for making
> the connection between the buses with 'parent', looks good to me.
>
>> status = "okay";
>> };
>>
>> diff --git a/arch/arm/boot/dts/exynos4412.dtsi b/arch/arm/boot/dts/exynos4412.dtsi
>> index d20db2dfe8e2..a70a671acacd 100644
>> --- a/arch/arm/boot/dts/exynos4412.dtsi
>> +++ b/arch/arm/boot/dts/exynos4412.dtsi
>> @@ -390,6 +390,7 @@
>> clocks = <&clock CLK_DIV_DMC>;
>> clock-names = "bus";
>> operating-points-v2 = <&bus_dmc_opp_table>;
>> + #interconnect-cells = <0>;
>> status = "disabled";
>> };
>>
>> @@ -398,6 +399,7 @@
>> clocks = <&clock CLK_DIV_ACP>;
>> clock-names = "bus";
>> operating-points-v2 = <&bus_acp_opp_table>;
>> + #interconnect-cells = <0>;
>> status = "disabled";
>> };
>>
>> @@ -406,6 +408,7 @@
>> clocks = <&clock CLK_DIV_C2C>;
>> clock-names = "bus";
>> operating-points-v2 = <&bus_dmc_opp_table>;
>> + #interconnect-cells = <0>;
>> status = "disabled";
>> };
>>
>> @@ -459,6 +462,7 @@
>> clocks = <&clock CLK_DIV_GDL>;
>> clock-names = "bus";
>> operating-points-v2 = <&bus_leftbus_opp_table>;
>> + #interconnect-cells = <0>;
>> status = "disabled";
>> };
>>
>> @@ -467,6 +471,7 @@
>> clocks = <&clock CLK_DIV_GDR>;
>> clock-names = "bus";
>> operating-points-v2 = <&bus_leftbus_opp_table>;
>> + #interconnect-cells = <0>;
>> status = "disabled";
>> };
>>
>> @@ -475,6 +480,7 @@
>> clocks = <&clock CLK_ACLK160>;
>> clock-names = "bus";
>> operating-points-v2 = <&bus_display_opp_table>;
>> + #interconnect-cells = <0>;
>> status = "disabled";
>> };
>>
>> @@ -483,6 +489,7 @@
>> clocks = <&clock CLK_ACLK133>;
>> clock-names = "bus";
>> operating-points-v2 = <&bus_fsys_opp_table>;
>> + #interconnect-cells = <0>;
>> status = "disabled";
>> };
>>
>> @@ -491,6 +498,7 @@
>> clocks = <&clock CLK_ACLK100>;
>> clock-names = "bus";
>> operating-points-v2 = <&bus_peri_opp_table>;
>> + #interconnect-cells = <0>;
>> status = "disabled";
>> };
>>
>> @@ -499,6 +507,7 @@
>> clocks = <&clock CLK_SCLK_MFC>;
>> clock-names = "bus";
>> operating-points-v2 = <&bus_leftbus_opp_table>;
>> + #interconnect-cells = <0>;
>> status = "disabled";
>> };
>>
>>
>
>
next prev parent reply other threads:[~2019-12-16 0:50 UTC|newest]
Thread overview: 41+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <CGME20190919142321eucas1p164c2591ad402427cb71fd00c348a29ec@eucas1p1.samsung.com>
2019-09-19 14:22 ` [RFC PATCH v2 00/11] Simple QoS for exynos-bus driver using interconnect Artur Świgoń
[not found] ` <CGME20190919142322eucas1p24bc477ee6e1bcd65546c305d55af097d@eucas1p2.samsung.com>
2019-09-19 14:22 ` [RFC PATCH v2 01/11] devfreq: exynos-bus: Extract exynos_bus_profile_init() Artur Świgoń
2019-09-20 2:15 ` Chanwoo Choi
2019-09-25 5:44 ` Artur Świgoń
2019-09-25 6:37 ` Chanwoo Choi
2019-09-25 6:41 ` Artur Świgoń
[not found] ` <CGME20190919142322eucas1p1949ad95468af26698c4c5addc060ce00@eucas1p1.samsung.com>
2019-09-19 14:22 ` [RFC PATCH v2 02/11] devfreq: exynos-bus: Extract exynos_bus_profile_init_passive() Artur Świgoń
[not found] ` <CGME20190919142323eucas1p2fc73a765389432f880fa28945fd28975@eucas1p2.samsung.com>
2019-09-19 14:22 ` [RFC PATCH v2 03/11] devfreq: exynos-bus: Change goto-based logic to if-else logic Artur Świgoń
[not found] ` <CGME20190919142324eucas1p1638cec2aafbfcaf03cfdfa7d0189143a@eucas1p1.samsung.com>
2019-09-19 14:22 ` [RFC PATCH v2 04/11] devfreq: exynos-bus: Clean up code Artur Świgoń
2019-09-20 2:22 ` Chanwoo Choi
2019-10-03 8:10 ` Artur Świgoń
[not found] ` <CGME20190919142325eucas1p28102446c22b1e1c61aae0bad46d079b0@eucas1p2.samsung.com>
2019-09-19 14:22 ` [RFC PATCH v2 05/11] interconnect: Export of_icc_get_from_provider() Artur Świgoń
2019-12-16 0:57 ` Chanwoo Choi
[not found] ` <CGME20190919142326eucas1p204819014fe85716b47e2de4af9102cd5@eucas1p2.samsung.com>
2019-09-19 14:22 ` [RFC PATCH v2 06/11] interconnect: Relax requirement in of_icc_get_from_provider() Artur Świgoń
[not found] ` <CGME20190919142327eucas1p183470eede07b50c1e3acda58f2af1eba@eucas1p1.samsung.com>
2019-09-19 14:22 ` [RFC PATCH v2 07/11] interconnect: Relax condition in apply_constraints() Artur Świgoń
[not found] ` <CGME20190919142329eucas1p299762f99dd55a5d625633ceec84219f9@eucas1p2.samsung.com>
2019-09-19 14:22 ` [RFC PATCH v2 08/11] arm: dts: exynos: Add parents and #interconnect-cells to Exynos4412 Artur Świgoń
2019-12-16 0:51 ` Chanwoo Choi
2019-12-16 2:59 ` Chanwoo Choi
2019-12-18 10:17 ` Artur Świgoń
2019-12-18 10:29 ` Chanwoo Choi
2019-12-18 10:41 ` Artur Świgoń
2019-12-16 0:55 ` Chanwoo Choi
2019-12-16 0:57 ` Chanwoo Choi [this message]
[not found] ` <CGME20190919142329eucas1p2e53992eab9ec6b404f716f955b3c228e@eucas1p2.samsung.com>
2019-09-19 14:22 ` [RFC PATCH v2 09/11] devfreq: exynos-bus: Add interconnect functionality to exynos-bus Artur Świgoń
2019-09-25 7:03 ` Chanwoo Choi
2019-09-25 7:12 ` Artur Świgoń
2019-12-02 17:05 ` Artur Świgoń
2019-12-05 2:36 ` Chanwoo Choi
2019-12-16 0:44 ` Chanwoo Choi
2019-12-18 10:18 ` Artur Świgoń
2019-12-18 10:39 ` Chanwoo Choi
2019-12-18 10:48 ` Artur Świgoń
2019-12-18 11:08 ` Chanwoo Choi
[not found] ` <CGME20190919142330eucas1p1eceae78b148a03f2af71657b7cdd6694@eucas1p1.samsung.com>
2019-09-19 14:22 ` [RFC PATCH v2 10/11] arm: dts: exynos: Add interconnects to Exynos4412 mixer Artur Świgoń
[not found] ` <CGME20190919142331eucas1p2107a7cb9ce8b3817ed171c21a8ad5b00@eucas1p2.samsung.com>
2019-09-19 14:22 ` [RFC PATCH v2 11/11] drm: exynos: mixer: Add interconnect support Artur Świgoń
2019-09-20 1:07 ` [RFC PATCH v2 00/11] Simple QoS for exynos-bus driver using interconnect Chanwoo Choi
2019-09-20 2:14 ` Chanwoo Choi
2019-09-25 5:47 ` Artur Świgoń
2019-09-25 6:12 ` Chanwoo Choi
2019-09-25 6:37 ` Artur Świgoń
2019-09-25 6:48 ` Chanwoo Choi
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