From: Jagan Teki <jagan@openedev.com>
To: maxime.ripard@bootlin.com, Jagan Teki <jagan@amarulasolutions.com>
Cc: Chen-Yu Tsai <wens@csie.org>, Icenowy Zheng <icenowy@aosc.io>,
Jernej Skrabec <jernej.skrabec@siol.net>,
Vasily Khoruzhick <anarsoul@gmail.com>,
Rob Herring <robh+dt@kernel.org>,
Mark Rutland <mark.rutland@arm.com>,
Catalin Marinas <catalin.marinas@arm.com>,
Will Deacon <will.deacon@arm.com>,
David Airlie <airlied@linux.ie>,
dri-devel <dri-devel@lists.freedesktop.org>,
Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>,
linux-clk <linux-clk@vger.kernel.org>,
Michael Trimarchi <michael@amarulasolutions.com>,
linux-arm-kernel <linux-arm-kernel@lists.infradead.org>,
devicetree <devicetree@vger.kernel.org>,
linux-kernel <linux-kernel@vger.kernel.org>,
linux-sunxi <linux-sunxi@googlegroups.com>
Subject: Re: [linux-sunxi] Re: [PATCH 06/12] drm/sun4i: sun6i_mipi_dsi: Fix VBP size calculation
Date: Mon, 1 Oct 2018 13:39:17 +0530 [thread overview]
Message-ID: <63b40c20-670b-1c53-bf5e-62f64e6e02f0@openedev.com> (raw)
In-Reply-To: <20180929135302.ymdzapz5npvapti2@flea>
On Saturday 29 September 2018 07:23 PM, Maxime Ripard wrote:
> On Thu, Sep 27, 2018 at 09:50:34PM +0530, Jagan Teki wrote:
>> On Thu, Sep 27, 2018 at 8:51 PM Maxime Ripard <maxime.ripard@bootlin.com> wrote:
>>>
>>> On Thu, Sep 27, 2018 at 05:18:44PM +0530, Jagan Teki wrote:
>>>> According to horizontal and vertical timings are defined
>>>> per the diagram from include/drm/drm_modes.h
>>>>
>>>> Back porch = [hv]total - [hv]sync_end
>>>>
>>>> So, update SUN6I_DSI_BASIC_SIZE0_VBP calculation as
>>>> mode->vtotal - mode->vsync_end
>>>>
>>>> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
>>>> ---
>>>> drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c | 4 ++--
>>>> 1 file changed, 2 insertions(+), 2 deletions(-)
>>>>
>>>> diff --git a/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c b/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c
>>>> index 1c7e42015645..599284971ab6 100644
>>>> --- a/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c
>>>> +++ b/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c
>>>> @@ -526,8 +526,8 @@ static void sun6i_dsi_setup_timings(struct sun6i_dsi *dsi,
>>>> regmap_write(dsi->regs, SUN6I_DSI_BASIC_SIZE0_REG,
>>>> SUN6I_DSI_BASIC_SIZE0_VSA(mode->vsync_end -
>>>> mode->vsync_start) |
>>>> - SUN6I_DSI_BASIC_SIZE0_VBP(mode->vsync_start -
>>>> - mode->vdisplay));
>>>> + SUN6I_DSI_BASIC_SIZE0_VBP(mode->vtotal -
>>>> + mode->vsync_end));
>>>
>>> Is it purely theoretical, or did you find some source that back that?
>>
>> VSA is done as per that, sync_end - sync start would give sync time.
>
> That's a different register though.
>
>> VBP also done in BPI-M64-bsp[1] which results back porch existing code
>> results fron porch.
>>
>> [1] https://github.com/BPI-SINOVOIP/BPI-M64-bsp/blob/master/linux-sunxi/drivers/video/sunxi/disp2/disp/de/lowlevel_sun50iw1/de_dsi.c#L955
>
> That code does back porch - sync length. Such a calculation doesn't
> make much sense as is, but you're saying that it results in the front
> porch. Again, what makes you say that?
No what code shows is not a real back porch value used for drm it's
panel back porch value which is a DTS property in BSP.
(I made wrong comment on previous mail as front porch, sorry)
here is the real code
from drivers/video/sunxi/disp2/disp/de/disp_lcd.c
timmings->ver_sync_time= panel_info->lcd_vspw;
timmings->ver_back_porch= panel_info->lcd_vbp-panel_info->lcd_vspw;
u32 vbp = panel->lcd_vbp;
u32 vspw = panel->lcd_vspw;
dsi_dev[sel]->dsi_basic_size0.bits.vbp = vbp-vspw;
So,
dsi_dev[sel]->dsi_basic_size0.bits.vbp = panel->lcd_vbp - panel->lcd_vspw;
=> timmings->ver_back_porch + panel_info->lcd_vspw - panel_info->lcd_vspw
=> timmings->ver_back_porch
=> mode->vtotal - mode->end
VSA, which a proper value.
dsi_dev[sel]->dsi_basic_size0.bits.vsa = vspw;
=> panel_info->lcd_vspw;
=> timmings->ver_sync_time
=> mode->vsync_end - mode->vsync_start
next prev parent reply other threads:[~2018-10-01 8:09 UTC|newest]
Thread overview: 47+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-09-27 11:48 [PATCH 00/12] drm/sun4i: Allwinner A64 MIPI-DSI support Jagan Teki
2018-09-27 11:48 ` [PATCH 01/12] clk: sunxi-ng: a64: Fix gate bit of DSI DPHY Jagan Teki
2018-09-27 11:48 ` [PATCH 02/12] drm/sun4i: sun6i_mipi_dsi: Add Allwinner A64 MIPI DSI support Jagan Teki
2018-09-27 11:48 ` [PATCH 03/12] dt-bindings: sun6i-dsi: Add compatible for A64 MIPI DSI Jagan Teki
2018-10-15 18:24 ` Rob Herring
2018-09-27 11:48 ` [PATCH 04/12] drm/sun4i: sun6i_mipi_dsi: Enable missing DSI bus clock Jagan Teki
2018-09-27 12:42 ` Chen-Yu Tsai
2018-09-27 13:44 ` Jagan Teki
2018-09-27 14:16 ` [linux-sunxi] " Chen-Yu Tsai
2018-09-27 16:26 ` Jagan Teki
2018-09-27 16:33 ` Chen-Yu Tsai
2018-09-27 11:48 ` [PATCH 05/12] drm/sun4i: sun6i_mipi_dsi: Add DSI Generic short write 2 param transfer Jagan Teki
2018-09-27 17:18 ` Maxime Ripard
2018-09-27 17:36 ` Jagan Teki
2018-09-29 13:47 ` Maxime Ripard
2018-09-27 11:48 ` [PATCH 06/12] drm/sun4i: sun6i_mipi_dsi: Fix VBP size calculation Jagan Teki
2018-09-27 15:21 ` Maxime Ripard
2018-09-27 16:20 ` Jagan Teki
2018-09-29 13:53 ` Maxime Ripard
2018-10-01 8:09 ` Jagan Teki [this message]
2018-10-08 15:05 ` [linux-sunxi] " Maxime Ripard
2018-09-27 11:48 ` [PATCH 07/12] drm/sun4i: sun6i_mipi_dsi: Fix TCON DRQ set bits Jagan Teki
2018-09-27 16:58 ` Maxime Ripard
2018-09-27 17:45 ` Jagan Teki
2018-10-02 13:20 ` Maxime Ripard
2018-10-03 3:22 ` [linux-sunxi] " Jagan Teki
2018-10-08 15:05 ` Maxime Ripard
2018-09-27 11:48 ` [PATCH 08/12] drm/sun4i: sun6i_mipi_dsi: Refactor vertical video start delay Jagan Teki
2018-09-27 17:14 ` Maxime Ripard
2018-09-27 17:33 ` Jagan Teki
2018-09-29 15:27 ` Maxime Ripard
2018-10-01 7:55 ` [linux-sunxi] " Jagan Teki
2018-10-02 13:29 ` Maxime Ripard
2018-09-27 11:48 ` [PATCH 09/12] dt-bindings: panel: Add Bananapi S070WV20-CT16 MIPI-DSI panel bindings Jagan Teki
2018-10-15 18:24 ` Rob Herring
2018-10-22 10:22 ` Chen-Yu Tsai
2018-10-23 15:11 ` Rob Herring
2018-10-24 20:22 ` Chen-Yu Tsai
2018-09-27 11:48 ` [PATCH 10/12] drm/panel: Add Bananapi S070WV20-CT16 MIPI-DSI panel driver Jagan Teki
2018-09-28 4:32 ` Chen-Yu Tsai
2018-10-04 16:06 ` Jagan Teki
2018-09-27 11:48 ` [PATCH 11/12] arm64: dts: allwinner: a64: Add DSI pipeline Jagan Teki
2018-09-27 17:16 ` Maxime Ripard
2018-09-27 11:48 ` [PATCH 12/12] arm64: dts: allwinner: bananapi-m64: Bananapi S070WV20-CT16 DSI panel Jagan Teki
2018-09-27 17:17 ` Maxime Ripard
2018-10-04 16:03 ` Jagan Teki
2018-10-05 15:31 ` Maxime Ripard
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