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From: Florian Fainelli <f.fainelli@gmail.com>
To: Kamal Dasu <kdasu.kdev@gmail.com>, linux-mtd@lists.infradead.org
Cc: bcm-kernel-feedback-list@broadcom.com,
	linux-kernel@vger.kernel.org,
	Brian Norris <computersforpeace@gmail.com>,
	Miquel Raynal <miquel.raynal@bootlin.com>,
	Richard Weinberger <richard@nod.at>,
	David Woodhouse <dwmw2@infradead.org>,
	Marek Vasut <marek.vasut@gmail.com>,
	Vignesh Raghavendra <vigneshr@ti.com>
Subject: Re: [PATCH v2 2/2] mtd: nand: raw: brcmnand: fallback to detected ecc-strength, ecc-step-size
Date: Mon, 20 May 2019 12:11:42 -0700	[thread overview]
Message-ID: <63bbd3eb-60c1-042c-633c-cfa6fbef528c@gmail.com> (raw)
In-Reply-To: <1558379144-28283-2-git-send-email-kdasu.kdev@gmail.com>

On 5/20/19 12:05 PM, Kamal Dasu wrote:
> This change supports nand-ecc-step-size and nand-ecc-strength fields in
> brcmnand DT node to be optional.
> see: Documentation/devicetree/bindings/mtd/brcm,brcmnand.txt
> 
> If both nand-ecc-strength and nand-ecc-step-size are not specified in
> device tree node for NAND, raw NAND layer does detect ECC information by
> reading ONFI extended parameter page for parts using ONFI >= 2.1.
> In case of non-ONFI NAND parts there could be a nand_id table entry with
> ECC information. If there is valid device tree entry for nand-ecc-strength
> and nand-ecc-step-size fields it still shall override the detected values.
> 
> Signed-off-by: Kamal Dasu <kdasu.kdev@gmail.com>
> ---
>  drivers/mtd/nand/raw/brcmnand/brcmnand.c | 11 +++++++++++
>  1 file changed, 11 insertions(+)
> 
> diff --git a/drivers/mtd/nand/raw/brcmnand/brcmnand.c b/drivers/mtd/nand/raw/brcmnand/brcmnand.c
> index ce0b8ff..a4d2057 100644
> --- a/drivers/mtd/nand/raw/brcmnand/brcmnand.c
> +++ b/drivers/mtd/nand/raw/brcmnand/brcmnand.c
> @@ -2144,6 +2144,17 @@ static int brcmnand_setup_dev(struct brcmnand_host *host)
>  		return -EINVAL;
>  	}
>  
> +	if (chip->ecc.mode != NAND_ECC_NONE &&
> +	    (!chip->ecc.size || !chip->ecc.strength)) {
> +		if (chip->base.eccreq.step_size && chip->base.eccreq.strength) {
> +			/* use detected ECC parameters */
> +			chip->ecc.size = chip->base.eccreq.step_size;
> +			chip->ecc.strength = chip->base.eccreq.strength;
> +			pr_info("Using ECC step-size %d, strength %d\n",
> +				chip->ecc.size, chip->ecc.strength);

Nit: should not we use dev_info(&host->pdev->dev) for printing the
message in case we have multiple NAND controllers on chip, that way we
can still differentiate them from the prints?
-- 
Florian

  reply	other threads:[~2019-05-20 19:11 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-05-20 19:05 [PATCH v2 1/2] dt-bindings: mtd: brcmnand: Make nand-ecc-strength and nand-ecc-step-size optional Kamal Dasu
2019-05-20 19:05 ` [PATCH v2 2/2] mtd: nand: raw: brcmnand: fallback to detected ecc-strength, ecc-step-size Kamal Dasu
2019-05-20 19:11   ` Florian Fainelli [this message]
2019-05-21  8:53     ` Miquel Raynal
2019-05-21  8:53     ` Miquel Raynal
2019-05-21  8:53 ` [PATCH v2 1/2] dt-bindings: mtd: brcmnand: Make nand-ecc-strength and nand-ecc-step-size optional Miquel Raynal
2019-05-21  9:31 ` Schrempf Frieder
2019-05-21  9:32   ` Miquel Raynal

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