From: Marc Zyngier <maz@kernel.org>
To: Cristian Ciocaltea <cristian.ciocaltea@gmail.com>
Cc: "Rob Herring" <robh@kernel.org>,
"Thomas Gleixner" <tglx@linutronix.de>,
"Jason Cooper" <jason@lakedaemon.net>,
"Andreas Färber" <afaerber@suse.de>,
"Manivannan Sadhasivam" <manivannan.sadhasivam@linaro.org>,
linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
"moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE"
<linux-arm-kernel@lists.infradead.org>,
linux-actions@lists.infradead.org
Subject: Re: [PATCH v5 1/3] dt-bindings: interrupt-controller: Add Actions SIRQ controller binding
Date: Thu, 27 Aug 2020 11:35:06 +0100 [thread overview]
Message-ID: <64580e3b9acada6ff4ae9fdef02ac304@kernel.org> (raw)
In-Reply-To: <20200827100629.GA2451538@BV030612LT>
On 2020-08-27 11:06, Cristian Ciocaltea wrote:
> On Wed, Aug 26, 2020 at 04:48:38PM -0600, Rob Herring wrote:
>> On Wed, Aug 26, 2020 at 3:42 PM Cristian Ciocaltea
>> <cristian.ciocaltea@gmail.com> wrote:
[...]
>> Ultimately the GIC trigger type has to be
>> something. Is it fixed or passed thru? If the latter, just use 0
>> (IRQ_TYPE_NONE) if the GIC trigger mode is not fixed. Having some sort
>> of translation of the trigger is pretty common.
>
> Yes, as explained above, the SIRQ controller performs indeed the
> translation of the incoming signal. So if I understand correctly, your
> suggestion would be to use the following inside the sirq node:
>
> interrupts = <GIC_SPI 13 IRQ_TYPE_NONE>, /* SIRQ0 */
> [...]
Please don't. If you are describing a GIC interrupt, use a
trigger that actually exists. Given that you have a 1:1
mapping between input and output, just encode the output
trigger that matches the input.
M.
--
Jazz is not dead. It just smells funny...
next prev parent reply other threads:[~2020-08-27 10:35 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-08-19 16:37 [PATCH v5 0/3] Add Actions Semi Owl family sirq support Cristian Ciocaltea
2020-08-19 16:37 ` [PATCH v5 1/3] dt-bindings: interrupt-controller: Add Actions SIRQ controller binding Cristian Ciocaltea
2020-08-25 22:09 ` Rob Herring
2020-08-26 21:42 ` Cristian Ciocaltea
2020-08-26 22:48 ` Rob Herring
2020-08-27 10:06 ` Cristian Ciocaltea
2020-08-27 10:35 ` Marc Zyngier [this message]
2020-08-27 15:24 ` Cristian Ciocaltea
2020-08-27 15:42 ` Marc Zyngier
2020-08-27 18:54 ` Cristian Ciocaltea
2020-08-19 16:37 ` [PATCH v5 2/3] irqchip: Add Actions Semi Owl SIRQ controller Cristian Ciocaltea
2020-08-19 16:37 ` [PATCH v5 3/3] MAINTAINERS: Add entries for " Cristian Ciocaltea
2020-08-22 13:17 ` [PATCH v5 0/3] Add Actions Semi Owl family sirq support Manivannan Sadhasivam
2020-08-22 23:05 ` Cristian Ciocaltea
2020-08-25 2:09 ` Manivannan Sadhasivam
2020-08-25 9:44 ` Cristian Ciocaltea
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