From: Janakarajan Natarajan <Janakarajan.Natarajan@amd.com>
To: kvm@vger.kernel.org, x86@kernel.org, linux-kernel@vger.kernel.org
Cc: Thomas Gleixner <tglx@linutronix.de>,
Ingo Molnar <mingo@redhat.com>, "H . Peter Anvin" <hpa@zytor.com>,
Paolo Bonzini <pbonzini@redhat.com>,
Radim Krcmar <rkrcmar@redhat.com>,
Len Brown <len.brown@intel.com>, Kyle Huey <me@kylehuey.com>,
Tom Lendacky <thomas.lendacky@amd.com>,
Borislav Petkov <bp@suse.de>,
Grzegorz Andrejczuk <grzegorz.andrejczuk@intel.com>,
Kan Liang <Kan.liang@intel.com>,
Janakarajan Natarajan <Janakarajan.Natarajan@amd.com>
Subject: [PATCH v3 1/3] x86/msr: Add AMD Core Perf Extension MSRs
Date: Fri, 8 Dec 2017 16:39:12 -0600 [thread overview]
Message-ID: <648e871903cde03efdb0a878ff819fc25e877893.1512771422.git.Janakarajan.Natarajan@amd.com> (raw)
In-Reply-To: <cover.1512771421.git.Janakarajan.Natarajan@amd.com>
Add the EventSelect and Counter MSRs for AMD Core Perf Extension.
Signed-off-by: Janakarajan Natarajan <Janakarajan.Natarajan@amd.com>
---
arch/x86/include/asm/msr-index.h | 14 ++++++++++++++
1 file changed, 14 insertions(+)
diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h
index 34c4922..93ad922 100644
--- a/arch/x86/include/asm/msr-index.h
+++ b/arch/x86/include/asm/msr-index.h
@@ -341,7 +341,21 @@
/* Fam 15h MSRs */
#define MSR_F15H_PERF_CTL 0xc0010200
+#define MSR_F15H_PERF_CTL0 MSR_F15H_PERF_CTL
+#define MSR_F15H_PERF_CTL1 (MSR_F15H_PERF_CTL + 2)
+#define MSR_F15H_PERF_CTL2 (MSR_F15H_PERF_CTL + 4)
+#define MSR_F15H_PERF_CTL3 (MSR_F15H_PERF_CTL + 6)
+#define MSR_F15H_PERF_CTL4 (MSR_F15H_PERF_CTL + 8)
+#define MSR_F15H_PERF_CTL5 (MSR_F15H_PERF_CTL + 10)
+
#define MSR_F15H_PERF_CTR 0xc0010201
+#define MSR_F15H_PERF_CTR0 MSR_F15H_PERF_CTR
+#define MSR_F15H_PERF_CTR1 (MSR_F15H_PERF_CTR + 2)
+#define MSR_F15H_PERF_CTR2 (MSR_F15H_PERF_CTR + 4)
+#define MSR_F15H_PERF_CTR3 (MSR_F15H_PERF_CTR + 6)
+#define MSR_F15H_PERF_CTR4 (MSR_F15H_PERF_CTR + 8)
+#define MSR_F15H_PERF_CTR5 (MSR_F15H_PERF_CTR + 10)
+
#define MSR_F15H_NB_PERF_CTL 0xc0010240
#define MSR_F15H_NB_PERF_CTR 0xc0010241
#define MSR_F15H_PTSC 0xc0010280
--
2.7.4
next prev parent reply other threads:[~2017-12-08 22:39 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-12-08 22:39 [PATCH v3 0/3] Support Perf Extension on AMD KVM guests Janakarajan Natarajan
2017-12-08 22:39 ` Janakarajan Natarajan [this message]
2017-12-08 22:39 ` [PATCH v3 2/3] x86/kvm: Add support for AMD Core Perf Extension in guest Janakarajan Natarajan
2017-12-08 22:39 ` [PATCH v3 3/3] x86/kvm: Expose AMD Core Perf Extension flag to guests Janakarajan Natarajan
2018-01-02 23:55 ` [PATCH v3 0/3] Support Perf Extension on AMD KVM guests Natarajan, Janakarajan
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