From: Hector Martin <marcan@marcan.st>
To: Marc Zyngier <maz@kernel.org>,
linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org
Cc: Mark Rutland <mark.rutland@arm.com>,
Will Deacon <will@kernel.org>, Sven Peter <sven@svenpeter.dev>,
Alyssa Rosenzweig <alyssa@rosenzweig.io>,
Rob Herring <robh+dt@kernel.org>,
Thomas Gleixner <tglx@linutronix.de>,
Dougall <dougallj@gmail.com>,
kernel-team@android.com
Subject: Re: [PATCH v2 7/8] drivers/perf: arm_pmu: Handle 47 bit counters
Date: Sun, 12 Dec 2021 16:26:18 +0900 [thread overview]
Message-ID: <67468c6c-d799-f407-a3e6-5f86c14af400@marcan.st> (raw)
In-Reply-To: <20211201134909.390490-8-maz@kernel.org>
On 01/12/2021 22.49, Marc Zyngier wrote:
> The current ARM PMU framework can only deal with 32 or 64bit counters.
> Teach it about a 47bit flavour.
>
> Yes, this is odd.
>
> Signed-off-by: Marc Zyngier <maz@kernel.org>
> ---
> drivers/perf/arm_pmu.c | 2 ++
> include/linux/perf/arm_pmu.h | 2 ++
> 2 files changed, 4 insertions(+)
>
> diff --git a/drivers/perf/arm_pmu.c b/drivers/perf/arm_pmu.c
> index 295cc7952d0e..0a9ed1a061ac 100644
> --- a/drivers/perf/arm_pmu.c
> +++ b/drivers/perf/arm_pmu.c
> @@ -109,6 +109,8 @@ static inline u64 arm_pmu_event_max_period(struct perf_event *event)
> {
> if (event->hw.flags & ARMPMU_EVT_64BIT)
> return GENMASK_ULL(63, 0);
> + else if (event->hw.flags & ARMPMU_EVT_47BIT)
> + return GENMASK_ULL(46, 0);
> else
> return GENMASK_ULL(31, 0);
> }
> diff --git a/include/linux/perf/arm_pmu.h b/include/linux/perf/arm_pmu.h
> index 2512e2f9cd4e..0407a38b470a 100644
> --- a/include/linux/perf/arm_pmu.h
> +++ b/include/linux/perf/arm_pmu.h
> @@ -26,6 +26,8 @@
> */
> /* Event uses a 64bit counter */
> #define ARMPMU_EVT_64BIT 1
> +/* Event uses a 47bit counter */
> +#define ARMPMU_EVT_47BIT 2
>
> #define HW_OP_UNSUPPORTED 0xFFFF
> #define C(_x) PERF_COUNT_HW_CACHE_##_x
>
Reviewed-by: Hector Martin <marcan@marcan.st>
--
Hector Martin (marcan@marcan.st)
Public Key: https://mrcn.st/pub
next prev parent reply other threads:[~2021-12-12 7:26 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-12-01 13:49 [PATCH v2 0/8] drivers/perf: CPU PMU driver for Apple M1 Marc Zyngier
2021-12-01 13:49 ` [PATCH v2 1/8] dt-bindings: arm-pmu: Document Apple PMU compatible strings Marc Zyngier
2021-12-12 7:27 ` Hector Martin
2021-12-01 13:49 ` [PATCH v2 2/8] dt-bindings: apple,aic: Add CPU PMU per-cpu pseudo-interrupts Marc Zyngier
2021-12-12 7:26 ` Hector Martin
2021-12-01 13:49 ` [PATCH v2 3/8] irqchip/apple-aic: Add cpumasks for E and P cores Marc Zyngier
2021-12-01 16:08 ` Mark Rutland
2021-12-03 16:32 ` Marc Zyngier
2021-12-12 7:22 ` Hector Martin
2021-12-12 7:30 ` Hector Martin
2021-12-13 14:43 ` Marc Zyngier
2021-12-01 13:49 ` [PATCH v2 4/8] irqchip/apple-aic: Wire PMU interrupts Marc Zyngier
2021-12-12 7:25 ` Hector Martin
2021-12-01 13:49 ` [PATCH v2 5/8] irqchip/apple-aic: Move PMU-specific registers to their own include file Marc Zyngier
2021-12-12 7:23 ` Hector Martin
2021-12-01 13:49 ` [PATCH v2 6/8] arm64: apple: t8301: Add PMU nodes Marc Zyngier
2021-12-12 7:26 ` Hector Martin
2021-12-01 13:49 ` [PATCH v2 7/8] drivers/perf: arm_pmu: Handle 47 bit counters Marc Zyngier
2021-12-12 7:26 ` Hector Martin [this message]
2021-12-01 13:49 ` [PATCH v2 8/8] drivers/perf: Add Apple icestorm/firestorm CPU PMU driver Marc Zyngier
2021-12-01 16:58 ` Mark Rutland
2021-12-01 17:56 ` Alyssa Rosenzweig
2021-12-02 15:39 ` Marc Zyngier
2021-12-02 16:14 ` Mark Rutland
2021-12-03 11:22 ` Marc Zyngier
2021-12-03 12:04 ` Mark Rutland
2021-12-03 16:22 ` Marc Zyngier
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