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Mon, 03 Dec 2018 01:00:13 -0800 (PST) Subject: Re: [PATCH v1 01/12] dt-bindings: usb: add support for dwc3 controller on HiSilicon SoCs To: Chen Yu , linux-usb@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: wangbinghui@hisilicon.com, suzhuangluan@hisilicon.com, kongfei@hisilicon.com, Greg Kroah-Hartman , Rob Herring , Mark Rutland , John Stultz References: <20181203034515.91412-1-chenyu56@huawei.com> <20181203034515.91412-2-chenyu56@huawei.com> <33cda716-d09c-28e7-d4b4-26f246786f5e@huawei.com> From: Sergei Shtylyov Message-ID: <680c5b9f-e2c7-926d-7d10-4ce2cd091282@cogentembedded.com> Date: Mon, 3 Dec 2018 11:59:55 +0300 User-Agent: Mozilla/5.0 (Windows NT 6.3; WOW64; rv:52.0) Gecko/20100101 Thunderbird/52.9.1 MIME-Version: 1.0 In-Reply-To: <33cda716-d09c-28e7-d4b4-26f246786f5e@huawei.com> Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-US Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 03.12.2018 11:51, Chen Yu wrote: >>> This patch adds binding descriptions to support the dwc3 controller >>> on HiSilicon SoCs and boards like the HiKey960. >>> >>> Cc: Greg Kroah-Hartman >>> Cc: Rob Herring >>> Cc: Mark Rutland >>> Cc: John Stultz >>> Signed-off-by: Yu Chen >>> --- >>>   .../devicetree/bindings/usb/dwc3-hisi.txt          | 67 ++++++++++++++++++++++ >>>   1 file changed, 67 insertions(+) >>>   create mode 100644 Documentation/devicetree/bindings/usb/dwc3-hisi.txt >>> >>> diff --git a/Documentation/devicetree/bindings/usb/dwc3-hisi.txt b/Documentation/devicetree/bindings/usb/dwc3-hisi.txt >>> new file mode 100644 >>> index 000000000000..d32d2299a0a1 >>> --- /dev/null >>> +++ b/Documentation/devicetree/bindings/usb/dwc3-hisi.txt >>> @@ -0,0 +1,67 @@ >>> +HiSilicon DWC3 USB SoC controller >>> + >>> +This file documents the parameters for the dwc3-hisi driver. >>> + >>> +Required properties: >>> +- compatible:    should be "hisilicon,hi3660-dwc3" >>> +- clocks:    A list of phandle + clock-specifier pairs for the >>> +        clocks listed in clock-names >>> +- clock-names:    Specify clock names >>> +- resets:    list of phandle and reset specifier pairs. >>> + >>> +Sub-nodes: >>> +The dwc3 core should be added as subnode to HiSilicon DWC3 as shown in the >>> +example below. The DT binding details of dwc3 can be found in: >>> +Documentation/devicetree/bindings/usb/dwc3.txt >>> + >>> +Example: >>> +    usb3: hisi_dwc3 { >>> +        compatible = "hisilicon,hi3660-dwc3"; >>> +        #address-cells = <2>; >>> +        #size-cells = <2>; >>> +        ranges; >>> + >>> +        clocks = <&crg_ctrl HI3660_CLK_ABB_USB>, >>> +             <&crg_ctrl HI3660_ACLK_GATE_USB3OTG>; >>> +        clock-names = "clk_usb3phy_ref", "aclk_usb3otg"; >>> +        assigned-clocks = <&crg_ctrl HI3660_ACLK_GATE_USB3OTG>; >>> +        assigned-clock-rates = <229000000>; >>> +        resets = <&crg_rst 0x90 8>, >>> +             <&crg_rst 0x90 7>, >>> +             <&crg_rst 0x90 6>, >>> +             <&crg_rst 0x90 5>; >>> + >>> +        dwc3: dwc3@ff100000 { >> >>     According to the DT spec, the node names should be generic, not chip specific, i.e. usb@ff100000 in this case. >> > > Do you mean it should be usb@ff100000: dwc3@ff100000 ? dwc3: usb@ff100000 "dwc3:" is a label, not name. > Thanks! > >> [...] MBR, Sergei