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([2600:1010:b008:3b8f:1dea:762f:4d89:de4d]) by smtp.gmail.com with ESMTPSA id s36sm6923408pgl.35.2020.05.22.15.43.37 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 22 May 2020 15:43:40 -0700 (PDT) Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable From: Andy Lutomirski Mime-Version: 1.0 (1.0) Subject: Re: [RFC][PATCH 0/4] x86/entry: disallow #DB more Date: Fri, 22 May 2020 15:43:35 -0700 Message-Id: <692612FC-4599-4774-857C-7E20CD99A832@amacapital.net> References: <20200522222055.GE25128@linux.intel.com> Cc: Andy Lutomirski , Peter Zijlstra , Thomas Gleixner , LKML , X86 ML In-Reply-To: <20200522222055.GE25128@linux.intel.com> To: Sean Christopherson X-Mailer: iPhone Mail (17E262) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org > On May 22, 2020, at 3:20 PM, Sean Christopherson wrote: >=20 > =EF=BB=BFOn Fri, May 22, 2020 at 03:13:57PM -0700, Andy Lutomirski wrote: >>> On Fri, May 22, 2020 at 1:49 PM Peter Zijlstra wr= ote: >>>=20 >>> Hai, this kills #DB during NMI/#MC and with that allows removing all the= nasty >>> IST rewrite crud. >>>=20 >>=20 >> This is great, except that the unconditional DR7 write is going to >> seriously hurt perf performance. Fortunately, no one cares about >> perf, right? :) Even just reading first won't help enough because DR7 >> reads are likely to be VM exits. Can we have a percpu dr7 shadow >> (with careful ordering) or even just a percpu count of dr7 users so we >> can skip this if there are no breakpoints? >=20 > Hmm, I believe hw_breakpoint_active() is what you're looking for, KVM uses= > it to avoid unnecessary restoration of host DR7 after VM-Exit. >=20 > Amusingly, checking that in the NMI handler could give a false positive if= > an NMI occurs in guest as DR7 is cleared on exit and KVM invokes the NMI > handler prior to restoring host DR7. I doubt that's common enough to care= > about though. False positives are unavoidable: there=E2=80=99s no way we can set a percpu v= ariable and set DR7 without risking an NMI in between.=