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Tue, 22 Dec 2020 03:01:51 +0000 Message-ID: <6acb4c0e2a9aa1fb9c67b36881ade4d0d264fcb1.camel@nxp.com> Subject: Re: [PATCH 04/14] dt-bindings: display: bridge: Add i.MX8qm/qxp pixel combiner binding From: Liu Ying To: Rob Herring Cc: dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-media@vger.kernel.org, airlied@linux.ie, daniel@ffwll.ch, shawnguo@kernel.org, s.hauer@pengutronix.de, kernel@pengutronix.de, festevam@gmail.com, linux-imx@nxp.com, mchehab@kernel.org, a.hajda@samsung.com, narmstrong@baylibre.com, Laurent.pinchart@ideasonboard.com, jonas@kwiboo.se, jernej.skrabec@siol.net, kishon@ti.com, vkoul@kernel.org Date: Tue, 22 Dec 2020 10:59:57 +0800 In-Reply-To: <20201221220713.GA610096@robh.at.kernel.org> References: <1608199173-28760-1-git-send-email-victor.liu@nxp.com> <1608199173-28760-5-git-send-email-victor.liu@nxp.com> <20201221220713.GA610096@robh.at.kernel.org> Content-Type: text/plain; charset="UTF-8" User-Agent: Evolution 3.36.4-0ubuntu1 Content-Transfer-Encoding: 7bit X-Originating-IP: [119.31.174.66] X-ClientProxiedBy: SGBP274CA0008.SGPP274.PROD.OUTLOOK.COM (2603:1096:4:b0::20) To VI1PR04MB3983.eurprd04.prod.outlook.com (2603:10a6:803:4c::16) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from blueberry.ap.freescale.net (119.31.174.66) by SGBP274CA0008.SGPP274.PROD.OUTLOOK.COM (2603:1096:4:b0::20) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.3676.28 via Frontend Transport; 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X-MS-Exchange-AntiSpam-MessageData: =?utf-8?B?bjVpemUrQWhERFRld3J3UWJqN21JSUFDZnlEdVc0dW1aeWRsdnRJSXlHb0pD?= =?utf-8?B?WnFKZVZ1QkI4RlpoZW1IaHdrN1dGWDZ6emFPb3U3VTBvY0c0UndkMG5xbkVx?= =?utf-8?B?b3VQRDQvWllJNXdoS2FIYzcrajc5eU5vYmRGejByU0xuZ3NRUHhyWHAvUjky?= =?utf-8?B?dC94TXlBbE9MQXdsLytNbHV0bGd4VmxFaTEzdEZsdjQ4bVNOWVdxMC8zaldT?= =?utf-8?B?VGZocHVjaWNoM3E1MDB4cUtUL1IrUkVUaFJnWUh5TXpKcmpJdWpSdHFDcmNQ?= =?utf-8?B?Wkdqc1FyejNPWXRzRmRLY3lOTHh4dFhTM01namsrb3NYaitES1hLN3ZtUEhu?= =?utf-8?B?QzB2NXR3UnZ1R2xFN3dsTXpWTnY1M1QvcUNHalhFcEpFLyt6SmdmVmNIY1JB?= =?utf-8?B?QnRLS1F3SGZRNFIyRWVIK1FpNS9aVnBidDhyUXlnZ0hzTkF5UU9mQjNzWnI0?= =?utf-8?B?c3hBa0FpdlphQTRxWnFZQkhzTXFoRGwyMUE3K3JzZlk3cllCSldkT0FlYkhp?= =?utf-8?B?Z2dlOHljTFNxUHFESjZ3NFcvRzBjeVdxVzRwMjNlUkhVeDJFQ0xja0tsN1Zz?= =?utf-8?B?MUpXOUdCWnQ5NG9VUXAwKzVZWGxLUUNzZjJFdzBqeWJud3lNMWJKNU5BZnVu?= =?utf-8?B?UjVJMlV2bndNQU8yeXlteG9VSHR6TG1jcERtTU9iUE5qb1Fud1REdVJYWU9D?= =?utf-8?B?eDZtNE10Q3UrUDNzbSsrMGxDS09CYklGam1oeGs3YysveXV3WGp6dFlpSEhK?= =?utf-8?B?L3VLemIzTU56b3NBM2hneXJXNHZXd3VpbCtueDZGU3JEQlp0V0xVZFQ0SUtX?= =?utf-8?B?L0JtTkpDaWd3N3BIaXRMMU95TmtSa3hXeUlCRk4vVU9mSzRtV1dGbSt6NG1v?= =?utf-8?B?eHRtOHhRMXhCY2R2N3dDcmt4c1VyeE43SEpMdkhWR3EvTy93TFhJWjJyS2tr?= =?utf-8?B?aCtVdVhpcC9MYkkxQ3hCNVRCTmh0OCtJTGhSYmpqUkZsY3loUnl3dGcrVGlG?= =?utf-8?B?anBtUzdwTzVHTW5Eb1hTdUY4UjVUT0s3S2JjenNnRzhHWWUyazE0WUlkeU90?= =?utf-8?B?SDNXaWVhb3M0Y05aM0Z4NVFuOWJUb3grQXJMSExGT2hqUzBnYnB3cDVKRjZo?= =?utf-8?B?OWNoNGcrNEg3bndFSlFTMnBYaHpBcTIzb1hPOG9kTXhzbmxad20zanVnUXU2?= =?utf-8?B?MTZkcmd1QnNXUkN4ZWJQdE0rTTNNMmNHa0tCcEMwMmlXMFZxMHFaNzlNcGZ6?= =?utf-8?B?VjhVdWhNdmh1emxpbE9QTmlxS1N0OEZCNVVER25hblJoeFF3dXpqNjRldlAr?= =?utf-8?Q?s6/jzlg37f6Dn0CszrexGE1hMJKNWSbvTp?= X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-AuthSource: VI1PR04MB3983.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 22 Dec 2020 03:01:51.2885 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-Network-Message-Id: bb5bb389-dd4f-4256-c2b9-08d8a625ee33 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: PcLgbfbd+EV+mK1lkIdU9yBsVw5mGQMWNxZs+fe4lJa7cAcUPZcA3kbI08oQ0X/nsF0IfBRxqXIVfid4/5M1SQ== X-MS-Exchange-Transport-CrossTenantHeadersStamped: VI1PR04MB5182 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, 2020-12-21 at 15:07 -0700, Rob Herring wrote: > On Thu, Dec 17, 2020 at 05:59:23PM +0800, Liu Ying wrote: > > This patch adds bindings for i.MX8qm/qxp pixel combiner. > > > > Signed-off-by: Liu Ying > > --- > > .../display/bridge/fsl,imx8qxp-pixel-combiner.yaml | 160 +++++++++++++++++++++ > > 1 file changed, 160 insertions(+) > > create mode 100644 Documentation/devicetree/bindings/display/bridge/fsl,imx8qxp-pixel-combiner.yaml > > > > diff --git a/Documentation/devicetree/bindings/display/bridge/fsl,imx8qxp-pixel-combiner.yaml b/Documentation/devicetree/bindings/display/bridge/fsl,imx8qxp-pixel-combiner.yaml > > new file mode 100644 > > index 00000000..bacacd8 > > --- /dev/null > > +++ b/Documentation/devicetree/bindings/display/bridge/fsl,imx8qxp-pixel-combiner.yaml > > @@ -0,0 +1,160 @@ > > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > > +%YAML 1.2 > > +--- > > +$id: https://eur01.safelinks.protection.outlook.com/?url=http%3A%2F%2Fdevicetree.org%2Fschemas%2Fdisplay%2Fbridge%2Ffsl%2Cimx8qxp-pixel-combiner.yaml%23&data=04%7C01%7Cvictor.liu%40nxp.com%7Ca98fcf2b328a42c15d1308d8a5fcc905%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C0%7C637441852425445153%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&sdata=%2FvqD2n1aI5sBaXbCHhsWCjp91Zk1wB8q69xNEssRVvE%3D&reserved=0 > > +$schema: https://eur01.safelinks.protection.outlook.com/?url=http%3A%2F%2Fdevicetree.org%2Fmeta-schemas%2Fcore.yaml%23&data=04%7C01%7Cvictor.liu%40nxp.com%7Ca98fcf2b328a42c15d1308d8a5fcc905%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C0%7C637441852425455147%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&sdata=h15%2FU7V8yTNeUPmnR%2FSGNolEHOYQwQ9gHyKwdoyg2q4%3D&reserved=0 > > + > > +title: Freescale i.MX8qm/qxp Pixel Combiner > > + > > +maintainers: > > + - Liu Ying > > + > > +description: | > > + The Freescale i.MX8qm/qxp Pixel Combiner takes two output streams from a > > + single display controller and manipulates the two streams to support a number > > + of modes(bypass, pixel combine, YUV444 to YUV422, split_RGB) configured as > > + either one screen, two screens, or virtual screens. The pixel combiner is > > + also responsible for generating some of the control signals for the pixel link > > + output channel. > > + > > +properties: > > + compatible: > > + enum: > > + - fsl,imx8qm-pixel-combiner > > + - fsl,imx8qxp-pixel-combiner > > + > > + "#address-cells": > > + const: 1 > > + > > + "#size-cells": > > + const: 0 > > + > > + reg: > > + maxItems: 1 > > + > > + clocks: > > + maxItems: 1 > > + > > + clock-names: > > + const: apb > > + > > + power-domains: > > + maxItems: 1 > > + > > +patternProperties: > > + "^channel@[0-1]$": > > + type: object > > + description: Represents a display stream of pixel combiner. > > + > > + properties: > > + "#address-cells": > > + const: 1 > > + > > + "#size-cells": > > + const: 0 > > + > > + reg: > > + description: The display stream index. > > + oneOf: > > + - const: 0 > > + - const: 1 > > enum: [ 0, 1 ] I forgot to modify this oneOf + const to enum. Will do. Thanks. > > > + > > + port@0: > > + type: object > > + description: Input endpoint of the display stream. > > + > > + properties: > > + reg: > > + const: 0 > > + > > + required: > > + - reg > > You can drop 'reg' parts. That's going to get covered by the graph > schema. I'm assuming the 'const' numbers for 'reg' parts are still needed, so I'll keep the 'const' parts. I'll drop 'required' parts for 'reg'. Liu Ying > > > + > > + port@1: > > + type: object > > + description: Output endpoint of the display stream. > > + > > + properties: > > + reg: > > + const: 1 > > + > > + required: > > + - reg > > + > > + required: > > + - "#address-cells" > > + - "#size-cells" > > + - reg > > + - port@0 > > + - port@1 > > + > > + additionalProperties: false > > + > > +required: > > + - compatible > > + - "#address-cells" > > + - "#size-cells" > > + - reg > > + - clocks > > + - clock-names > > + - power-domains > > + > > +additionalProperties: false > > + > > +examples: > > + - | > > + #include > > + #include > > + pixel-combiner@56020000 { > > + compatible = "fsl,imx8qxp-pixel-combiner"; > > + #address-cells = <1>; > > + #size-cells = <0>; > > + reg = <0x56020000 0x10000>; > > + clocks = <&dc0_pixel_combiner_lpcg IMX_LPCG_CLK_4>; > > + clock-names = "apb"; > > + power-domains = <&pd IMX_SC_R_DC_0>; > > + > > + channel@0 { > > + #address-cells = <1>; > > + #size-cells = <0>; > > + reg = <0>; > > + > > + port@0 { > > + reg = <0>; > > + > > + dc0_pixel_combiner_ch0_dc0_dpu_disp0: endpoint { > > + remote-endpoint = <&dc0_dpu_disp0_dc0_pixel_combiner_ch0>; > > + }; > > + }; > > + > > + port@1 { > > + reg = <1>; > > + > > + dc0_pixel_combiner_ch0_dc0_pixel_link0: endpoint { > > + remote-endpoint = <&dc0_pixel_link0_dc0_pixel_combiner_ch0>; > > + }; > > + }; > > + }; > > + > > + channel@1 { > > + #address-cells = <1>; > > + #size-cells = <0>; > > + reg = <1>; > > + > > + port@0 { > > + reg = <0>; > > + > > + dc0_pixel_combiner_ch1_dc0_dpu_disp1: endpoint { > > + remote-endpoint = <&dc0_dpu_disp1_dc0_pixel_combiner_ch1>; > > + }; > > + }; > > + > > + port@1 { > > + reg = <1>; > > + > > + dc0_pixel_combiner_ch1_dc0_pixel_link1: endpoint { > > + remote-endpoint = <&dc0_pixel_link1_dc0_pixel_combiner_ch1>; > > + }; > > + }; > > + }; > > + }; > > -- > > 2.7.4 > >