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([2a01:e34:ed2f:f020:ccb6:ce78:2bcd:4ead]) by smtp.googlemail.com with ESMTPSA id m8sm9617258wmc.27.2020.12.17.13.19.50 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 17 Dec 2020 13:19:51 -0800 (PST) Subject: Re: [PATCH v2 47/48] ARM: tegra: ventana: Support CPU voltage scaling and thermal throttling To: Dmitry Osipenko , Thierry Reding , Jonathan Hunter , Mark Brown , Liam Girdwood , Ulf Hansson , Mauro Carvalho Chehab , Rob Herring , Peter Geis , Nicolas Chauvet , Krzysztof Kozlowski , "Rafael J. Wysocki" , Kevin Hilman , Peter De Schrijver , Viresh Kumar , Stephen Boyd , Michael Turquette Cc: devel@driverdev.osuosl.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-media@vger.kernel.org, linux-tegra@vger.kernel.org, linux-clk@vger.kernel.org References: <20201217180638.22748-1-digetx@gmail.com> <20201217180638.22748-48-digetx@gmail.com> <91139f8b-0b83-dd8a-ba53-8e7a499e6344@linaro.org> <776e0e84-e395-2bfb-f1ee-c34864b1cf16@linaro.org> From: Daniel Lezcano Message-ID: <6afaf91c-d0ce-265d-4b71-0ea8da19918b@linaro.org> Date: Thu, 17 Dec 2020 22:19:49 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.10.0 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 17/12/2020 21:28, Dmitry Osipenko wrote: > 17.12.2020 22:36, Daniel Lezcano пишет: >>>>> + type = "critical"; >>>>> + }; >>>>> + }; >>>>> + >>>>> + cooling-maps { >>>>> + map0 { >>>>> + trip = <&trip0>; >>>>> + cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; >>>> You should add all CPUs here. >>> >>> All CPU cores are coupled on Tegra in regards to CPUFreq, hence I think >>> it won't make any difference if secondary CPU cores will be added here, >>> isn't it? >> The explanation is in the description of commit ef4734500407ce4d > > I think that really only makes sense if CPU cores have independent clock > rate management. ATM I did not see any ARM platform having a clock line per CPU but I may be wrong. > IIRC, I actually made some research about this in the > past and intentionally removed the secondary cores from the > cooling-device since they didn't make any difference for a coupled CPU > cores. > > That commit also says: > > "But as soon as this CPU ordering changes and any other CPU is used to > bring up the cooling device, we will start seeing failures." > > I don't quite understand to what "failures" that commit referrers. I > tried to change the cpu0 to cpu1 in the cooling-device and don't see any > failures. Could you please clarify this? > > In general it should be fine to add all the cores to the cooling-device > and I'll do it in v3, but I want to make it clear why this is needed. AFAIR, if CPU0 is unplugged the cooling device can not rebind to CPU1. And if CPU0 is plugged in again, the cooling device fails to initialize. And, if the CPUs are mapped with the physical CPU0 to Linux numbering CPU1, the cooling device mapping will fail. -- Linaro.org │ Open source software for ARM SoCs Follow Linaro: Facebook | Twitter | Blog