From: "Leizhen (ThunderTown)" <thunder.leizhen@huawei.com>
To: Robin Murphy <robin.murphy@arm.com>,
Will Deacon <will@kernel.org>,
"Mark Rutland" <mark.rutland@arm.com>,
Joerg Roedel <joro@8bytes.org>,
linux-arm-kernel <linux-arm-kernel@lists.infradead.org>,
iommu <iommu@lists.linux-foundation.org>,
linux-kernel <linux-kernel@vger.kernel.org>
Cc: Jean-Philippe Brucker <jean-philippe@linaro.org>
Subject: Re: [PATCH v3 3/3] iommu/arm-smmu-v3: Reserving the entire SMMU register space
Date: Sat, 30 Jan 2021 09:54:24 +0800 [thread overview]
Message-ID: <6c5b4dca-24d4-55d7-1345-2238567cb958@huawei.com> (raw)
In-Reply-To: <fa170300-57d9-3883-c70f-d455a9e461f0@arm.com>
On 2021/1/29 23:27, Robin Murphy wrote:
> On 2021-01-27 11:32, Zhen Lei wrote:
>> commit 52f3fab0067d ("iommu/arm-smmu-v3: Don't reserve implementation
>> defined register space") only reserves the basic SMMU register space. So
>> the ECMDQ register space is not covered, it should be mapped again. Due
>> to the size of this ECMDQ resource is not fixed, depending on
>> SMMU_IDR6.CMDQ_CONTROL_PAGE_LOG2NUMQ. Processing its resource reservation
>> to avoid resource conflict with PMCG is a bit more complicated.
>>
>> Therefore, the resources of the PMCG are not reserved, and the entire SMMU
>> resources are reserved.
>
> This is the opposite of what I suggested. My point was that it will make the most sense to map the ECMDQ pages as a separate request anyway, therefore there is no reason to stop mapping page 0 and page 1 separately either.
I don't understand why the ECMDQ mapping must be performed separately. If the conflict with PMCG resources is eliminated. ECMDQ cannot be a separate driver like PMCG.
>
> If we need to expand the page 0 mapping to cover more of page 0 to reach the SMMU_CMDQ_CONTROL_PAGE_* registers, we can do that when we actually add ECMDQ support.
>
> Robin.
>
>> Suggested-by: Robin Murphy <robin.murphy@arm.com>
>> Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
>> ---
>> drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 24 ++++--------------------
>> drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h | 2 --
>> 2 files changed, 4 insertions(+), 22 deletions(-)
>>
>> diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
>> index f04c55a7503c790..fde24403b06a9e3 100644
>> --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
>> +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
>> @@ -3476,14 +3476,6 @@ static int arm_smmu_set_bus_ops(struct iommu_ops *ops)
>> return err;
>> }
>> -static void __iomem *arm_smmu_ioremap(struct device *dev, resource_size_t start,
>> - resource_size_t size)
>> -{
>> - struct resource res = DEFINE_RES_MEM(start, size);
>> -
>> - return devm_ioremap_resource(dev, &res);
>> -}
>> -
>> static int arm_smmu_device_probe(struct platform_device *pdev)
>> {
>> int irq, ret;
>> @@ -3519,22 +3511,14 @@ static int arm_smmu_device_probe(struct platform_device *pdev)
>> }
>> ioaddr = res->start;
>> - /*
>> - * Don't map the IMPLEMENTATION DEFINED regions, since they may contain
>> - * the PMCG registers which are reserved by the PMU driver.
>> - */
>> - smmu->base = arm_smmu_ioremap(dev, ioaddr, ARM_SMMU_REG_SZ);
>> + smmu->base = devm_ioremap_resource(dev, res);
>> if (IS_ERR(smmu->base))
>> return PTR_ERR(smmu->base);
>> - if (arm_smmu_resource_size(smmu) > SZ_64K) {
>> - smmu->page1 = arm_smmu_ioremap(dev, ioaddr + SZ_64K,
>> - ARM_SMMU_REG_SZ);
>> - if (IS_ERR(smmu->page1))
>> - return PTR_ERR(smmu->page1);
>> - } else {
>> + if (arm_smmu_resource_size(smmu) > SZ_64K)
>> + smmu->page1 = smmu->base + SZ_64K;
>> + else
>> smmu->page1 = smmu->base;
>> - }
>> /* Interrupt lines */
>> diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h
>> index da525f46dab4fc1..63f2b476987d6ae 100644
>> --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h
>> +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h
>> @@ -152,8 +152,6 @@
>> #define ARM_SMMU_PRIQ_IRQ_CFG1 0xd8
>> #define ARM_SMMU_PRIQ_IRQ_CFG2 0xdc
>> -#define ARM_SMMU_REG_SZ 0xe00
>> -
>> /* Common MSI config fields */
>> #define MSI_CFG0_ADDR_MASK GENMASK_ULL(51, 2)
>> #define MSI_CFG2_SH GENMASK(5, 4)
>>
>
> .
>
next prev parent reply other threads:[~2021-01-30 10:11 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-01-27 11:32 [PATCH v3 0/3] perf/smmuv3: Don't reserve the PMCG register spaces Zhen Lei
2021-01-27 11:32 ` [PATCH v3 1/3] " Zhen Lei
[not found] ` <a794cb2f-599e-c346-042e-d361d5321cce@arm.com>
2021-01-30 2:23 ` Leizhen (ThunderTown)
2021-01-27 11:32 ` [PATCH v3 2/3] perf/smmuv3: Add a MODULE_SOFTDEP() to indicate dependency on SMMU Zhen Lei
[not found] ` <67e0859b-2633-3516-527f-57557e210fa1@arm.com>
[not found] ` <4b116f38-84da-9ef9-350c-8900944b0433@huawei.com>
2021-01-29 17:03 ` Robin Murphy
2021-01-30 1:34 ` Leizhen (ThunderTown)
2021-01-27 11:32 ` [PATCH v3 3/3] iommu/arm-smmu-v3: Reserving the entire SMMU register space Zhen Lei
[not found] ` <fa170300-57d9-3883-c70f-d455a9e461f0@arm.com>
2021-01-30 1:54 ` Leizhen (ThunderTown) [this message]
2021-02-01 11:44 ` Robin Murphy
2021-02-01 12:00 ` Leizhen (ThunderTown)
2021-01-28 20:31 ` [PATCH v3 0/3] perf/smmuv3: Don't reserve the PMCG register spaces Will Deacon
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=6c5b4dca-24d4-55d7-1345-2238567cb958@huawei.com \
--to=thunder.leizhen@huawei.com \
--cc=iommu@lists.linux-foundation.org \
--cc=jean-philippe@linaro.org \
--cc=joro@8bytes.org \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=mark.rutland@arm.com \
--cc=robin.murphy@arm.com \
--cc=will@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).