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([2001:b07:6468:f312:5e2c:eb9a:a8b6:fd3e]) by smtp.gmail.com with ESMTPSA id a22sm140361edu.14.2021.04.14.09.58.51 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 14 Apr 2021 09:58:52 -0700 (PDT) Subject: Re: [PATCH 2/2] KVM: x86: Fix split-irqchip vs interrupt injection window request To: Lai Jiangshan Cc: Sean Christopherson , LKML , kvm@vger.kernel.org, Filippo Sironi , David Woodhouse , "v4.7+" , Wanpeng Li References: <20201127112114.3219360-1-pbonzini@redhat.com> <20201127112114.3219360-3-pbonzini@redhat.com> <80b013dc-0078-76f4-1299-3cff261ef7d8@redhat.com> From: Paolo Bonzini Message-ID: <6d9dafb1-b8ff-82ef-93dc-da869fe7ba0f@redhat.com> Date: Wed, 14 Apr 2021 18:58:49 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.7.0 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-US Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 14/04/21 04:28, Lai Jiangshan wrote: > On Tue, Apr 13, 2021 at 8:15 PM Paolo Bonzini wrote: >> >> On 13/04/21 13:03, Lai Jiangshan wrote: >>> This patch claims that it has a place to >>> stash the IRQ when EFLAGS.IF=0, but inject_pending_event() seams to ignore >>> EFLAGS.IF and queues the IRQ to the guest directly in the first branch >>> of using "kvm_x86_ops.set_irq(vcpu)". >> >> This is only true for pure-userspace irqchip. For split-irqchip, in >> which case the "place to stash" the interrupt is >> vcpu->arch.pending_external_vector. >> >> For pure-userspace irqchip, KVM_INTERRUPT only cares about being able to >> stash the interrupt in vcpu->arch.interrupt.injected. It is indeed >> wrong for userspace to call KVM_INTERRUPT if the vCPU is not ready for >> interrupt injection, but KVM_INTERRUPT does not return an error. > > Thanks for the reply. > > May I ask what is the correct/practical way of using KVM_INTERRUPT ABI > for pure-userspace irqchip. > > gVisor is indeed a pure-userspace irqchip, it will call KVM_INTERRUPT > when kvm_run->ready_for_interrupt_injection=1 (along with other conditions > unrelated to our discussion). > > https://github.com/google/gvisor/blob/a9441aea2780da8c93da1c73da860219f98438de/pkg/sentry/platform/kvm/bluepill_amd64_unsafe.go#L105 > > if kvm_run->ready_for_interrupt_injection=1 when expection pending or > EFLAGS.IF=0, it would be unexpected for gVisor. Not with EFLAGS.IF=0. For pending exception, there is code to handle it in inject_pending_event: ... if (!vcpu->arch.exception.pending) { if (vcpu->arch.nmi_injected) { static_call(kvm_x86_set_nmi)(vcpu); can_inject = false; } else if (vcpu->arch.interrupt.injected) { static_call(kvm_x86_set_irq)(vcpu); can_inject = false; } } ... if (vcpu->arch.exception.pending) { ... can_inject = false; } // this is vcpu->arch.interrupt.injected for userspace LAPIC if (kvm_cpu_has_injectable_intr(vcpu)) { r = can_inject ? static_call(kvm_x86_interrupt_allowed)(vcpu, true) : -EBUSY; if (r < 0) goto busy; ... } so what happens is: - the interrupt will not be injected before the exception - KVM will schedule an immediate vmexit to inject the interrupt as well - if (as is likely) the exception has turned off interrupts, the next call to inject_pending_event will reach static_call(kvm_x86_enable_irq_window) and the interrupt will only be injected when IF becomes 1 again. Paolo