From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.6 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5F550C43441 for ; Tue, 27 Nov 2018 12:20:52 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 2467C2145D for ; Tue, 27 Nov 2018 12:20:51 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="RVlA44VW" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 2467C2145D Authentication-Results: mail.kernel.org; dmarc=fail (p=quarantine dis=none) header.from=ti.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728851AbeK0XSe (ORCPT ); Tue, 27 Nov 2018 18:18:34 -0500 Received: from lelv0142.ext.ti.com ([198.47.23.249]:35984 "EHLO lelv0142.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726447AbeK0XSe (ORCPT ); Tue, 27 Nov 2018 18:18:34 -0500 Received: from lelv0265.itg.ti.com ([10.180.67.224]) by lelv0142.ext.ti.com (8.15.2/8.15.2) with ESMTP id wARCKNQ2101735; Tue, 27 Nov 2018 06:20:23 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1543321223; bh=1kgwBJMA2NUyWMjqpVPoBztON41Rm1tuizCougoadNs=; h=Subject:To:CC:References:From:Date:In-Reply-To; b=RVlA44VW11+Hm07b5daAnX0+Uh24p9z9yri5/iSDv1ZMOLujUlr8ngkbxsZEyoYS5 eSBJDIC4jxyCttnrZlsiTykv7jsZjfqWRgquECktVesid5P9PoxAVAKPPkmBy+jqaU RnCv3HBYUz7puprJYZPW+VC6NgnBfpxy16n7RdEY= Received: from DFLE112.ent.ti.com (dfle112.ent.ti.com [10.64.6.33]) by lelv0265.itg.ti.com (8.15.2/8.15.2) with ESMTPS id wARCKNHm018292 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Tue, 27 Nov 2018 06:20:23 -0600 Received: from DFLE106.ent.ti.com (10.64.6.27) by DFLE112.ent.ti.com (10.64.6.33) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1591.10; Tue, 27 Nov 2018 06:20:23 -0600 Received: from dflp33.itg.ti.com (10.64.6.16) by DFLE106.ent.ti.com (10.64.6.27) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.1591.10 via Frontend Transport; Tue, 27 Nov 2018 06:20:23 -0600 Received: from [172.24.190.172] (ileax41-snat.itg.ti.com [10.172.224.153]) by dflp33.itg.ti.com (8.14.3/8.13.8) with ESMTP id wARCKJxI028821; Tue, 27 Nov 2018 06:20:20 -0600 Subject: Re: [PATCH 00/12] ARM: davinci: fix GPIO breakage after v4.19 To: Bartosz Golaszewski , Kevin Hilman , Russell King , Keerthy , Linus Walleij , Grygorii Strashko CC: , , , Bartosz Golaszewski References: <20181121093523.12503-1-brgl@bgdev.pl> From: Sekhar Nori Message-ID: <6eb91ecb-47b1-8f77-afcc-9ace3cb15b82@ti.com> Date: Tue, 27 Nov 2018 17:50:19 +0530 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.2.1 MIME-Version: 1.0 In-Reply-To: <20181121093523.12503-1-brgl@bgdev.pl> Content-Type: text/plain; charset="utf-8" Content-Language: en-US Content-Transfer-Encoding: 7bit X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Bartosz, On 21/11/18 3:05 PM, Bartosz Golaszewski wrote: > From: Bartosz Golaszewski > > This is the entire set of changes needed to fix the broken GPIO support > for DaVinci boards in legacy mode after certain changes made to the > GPIO driver in 4.19, namely: commits 587f7a694f01 ("gpio: davinci: Use > dev name for label and automatic base selection") and eb3744a2dd01 > ("gpio: davinci: Do not assume continuous IRQ numbering"). I applied this series and sent a pull request to ARM SoC too. Thanks, Sekhar