From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1981BC04FF3 for ; Mon, 24 May 2021 19:57:33 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id EE6176105A for ; Mon, 24 May 2021 19:57:32 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233026AbhEXT7A (ORCPT ); Mon, 24 May 2021 15:59:00 -0400 Received: from m43-7.mailgun.net ([69.72.43.7]:62504 "EHLO m43-7.mailgun.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232548AbhEXT65 (ORCPT ); Mon, 24 May 2021 15:58:57 -0400 DKIM-Signature: a=rsa-sha256; v=1; c=relaxed/relaxed; d=mg.codeaurora.org; q=dns/txt; s=smtp; t=1621886249; h=Message-ID: References: In-Reply-To: Subject: Cc: To: From: Date: Content-Transfer-Encoding: Content-Type: MIME-Version: Sender; bh=3PgdOwZHHK2LbackkccgQl1/jIrQovrjITcU10//viA=; b=TS2xxKCinN9MD5El3usoRb+9kpWqXuwwdPKA9rACk6drjrxit/udBOoH+pQQ0pym+Pz5PBz4 g8OvLLIk5cNU6xVecfmgeqhGpVpMCHYsUwDFM9pHEf2x1+lgJYF6JG0kL6YK75I0XqHV/xTE H3c2R00mHD3hdxIc/fsAj6b4wE4= X-Mailgun-Sending-Ip: 69.72.43.7 X-Mailgun-Sid: WyI0MWYwYSIsICJsaW51eC1rZXJuZWxAdmdlci5rZXJuZWwub3JnIiwgImJlOWU0YSJd Received: from smtp.codeaurora.org (ec2-35-166-182-171.us-west-2.compute.amazonaws.com [35.166.182.171]) by smtp-out-n05.prod.us-east-1.postgun.com with SMTP id 60ac051f60c53c8c9dabb977 (version=TLS1.2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256); Mon, 24 May 2021 19:57:19 GMT Sender: khsieh=codeaurora.org@mg.codeaurora.org Received: by smtp.codeaurora.org (Postfix, from userid 1001) id 25CC1C4323A; Mon, 24 May 2021 19:57:19 +0000 (UTC) Received: from mail.codeaurora.org (localhost.localdomain [127.0.0.1]) (using TLSv1 with cipher ECDHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) (Authenticated sender: khsieh) by smtp.codeaurora.org (Postfix) with ESMTPSA id EA6DFC433F1; Mon, 24 May 2021 19:57:17 +0000 (UTC) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII; format=flowed Content-Transfer-Encoding: 7bit Date: Mon, 24 May 2021 12:57:17 -0700 From: khsieh@codeaurora.org To: Stephen Boyd Cc: Rob Clark , linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, Dmitry Baryshkov , Abhinav Kumar , aravindh@codeaurora.org, Sean Paul Subject: Re: [PATCH 3/3] drm/msm/dp: Handle aux timeouts, nacks, defers In-Reply-To: References: <20210507212505.1224111-1-swboyd@chromium.org> <20210507212505.1224111-4-swboyd@chromium.org> <1133b2c21eb8f385c16c610638a17d9c@codeaurora.org> Message-ID: <6ed169ecd2d1c91005b848fc486afa75@codeaurora.org> X-Sender: khsieh@codeaurora.org User-Agent: Roundcube Webmail/1.3.9 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 2021-05-24 12:19, Stephen Boyd wrote: > Quoting khsieh@codeaurora.org (2021-05-24 09:33:49) >> On 2021-05-07 14:25, Stephen Boyd wrote: >> > @@ -367,36 +347,38 @@ static ssize_t dp_aux_transfer(struct drm_dp_aux >> > *dp_aux, >> > } >> > >> > ret = dp_aux_cmd_fifo_tx(aux, msg); >> > - >> > if (ret < 0) { >> > if (aux->native) { >> > aux->retry_cnt++; >> > if (!(aux->retry_cnt % MAX_AUX_RETRIES)) >> > dp_catalog_aux_update_cfg(aux->catalog); >> > } >> > - usleep_range(400, 500); /* at least 400us to next try */ >> > - goto unlock_exit; >> > - } >> >> 1) dp_catalog_aux_update_cfg(aux->catalog) will not work without >> dp_catalog_aux_reset(aux->catalog); >> dp_catalog_aux_reset(aux->catalog) will reset hpd control block and >> potentially cause pending hpd interrupts got lost. >> Therefore I think we should not do >> dp_catalog_aux_update_cfg(aux->catalog) for now. >> reset aux controller will reset hpd control block probolem will be >> fixed >> at next chipset. >> after that we can add dp_catalog_aux_update_cfg(aux->catalog) followed >> by dp_catalog_aux_reset(aux->catalog) back at next chipset. > > Hmm ok. So the phy calibration logic that tweaks the tuning values is > never used? Why can't the phy be tuned while it is active? I don't > understand why we would ever want to reset the aux phy when changing > the > settings for a retry. Either way, this is not actually changing in this > patch so it would be another patch to remove this code. ok, > >> >> 2) according to DP specification, aux read/write failed have to wait >> at >> least 400us before next try can start. >> Otherwise, DP compliant test will failed > > Yes. The caller of this function, drm_dp_dpcd_access(), has the delay > already > > if (ret != 0 && ret != -ETIMEDOUT) { > usleep_range(AUX_RETRY_INTERVAL, > AUX_RETRY_INTERVAL + 100); > } > > so this delay here is redundant. yes, you are right. This is enough.