From: Chanwoo Choi <cw00.choi@samsung.com>
To: "Andrew-sh.Cheng" <andrew-sh.cheng@mediatek.com>,
MyungJoo Ham <myungjoo.ham@samsung.com>,
Kyungmin Park <kyungmin.park@samsung.com>,
Rob Herring <robh+dt@kernel.org>,
Mark Rutland <mark.rutland@arm.com>,
Matthias Brugger <matthias.bgg@gmail.com>,
"Rafael J. Wysocki" <rjw@rjwysocki.net>,
Viresh Kumar <viresh.kumar@linaro.org>,
Nishanth Menon <nm@ti.com>, Stephen Boyd <sboyd@kernel.org>,
Liam Girdwood <lgirdwood@gmail.com>,
Mark Brown <broonie@kernel.org>
Cc: linux-pm@vger.kernel.org, devicetree@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-mediatek@lists.infradead.org, linux-kernel@vger.kernel.org,
srv_heupstream@mediatek.com
Subject: Re: [PATCH V8 7/8] devfreq: mediatek: cci devfreq register opp notification for SVS support
Date: Thu, 25 Mar 2021 17:11:14 +0900 [thread overview]
Message-ID: <6f1f7bf5-54b0-d3e2-e93c-fa4a837c9222@samsung.com> (raw)
In-Reply-To: <1616499241-4906-8-git-send-email-andrew-sh.cheng@mediatek.com>
Hi,
I think that you can squash this patch to patch4.
On 3/23/21 8:34 PM, Andrew-sh.Cheng wrote:
> From: "Andrew-sh.Cheng" <andrew-sh.cheng@mediatek.com>
>
> SVS will change the voltage of opp item.
What it the full name of SVS?
> CCI devfreq need to react to change frequency.
>
> Signed-off-by: Andrew-sh.Cheng <andrew-sh.cheng@mediatek.com>
> ---
> drivers/devfreq/mt8183-cci-devfreq.c | 27 +++++++++++++++++++++++++++
> 1 file changed, 27 insertions(+)
>
> diff --git a/drivers/devfreq/mt8183-cci-devfreq.c b/drivers/devfreq/mt8183-cci-devfreq.c
> index 018543db7bae..6942a48f3f4f 100644
> --- a/drivers/devfreq/mt8183-cci-devfreq.c
> +++ b/drivers/devfreq/mt8183-cci-devfreq.c
> @@ -21,6 +21,7 @@ struct cci_devfreq {
> struct clk *cci_clk;
> int old_vproc;
> unsigned long old_freq;
> + struct notifier_block opp_nb;
> };
>
> static int mtk_cci_set_voltage(struct cci_devfreq *cci_df, int vproc)
> @@ -89,6 +90,26 @@ static int mtk_cci_devfreq_target(struct device *dev, unsigned long *freq,
> return 0;
> }
>
> +static int ccidevfreq_opp_notifier(struct notifier_block *nb,
I think that you better to change the function name as following:
ccidevfreq_opp_notifier -> mtk_cci_devfreq_opp_notifier
> + unsigned long event, void *data)
> +{
> + struct dev_pm_opp *opp = data;
> + struct cci_devfreq *cci_df = container_of(nb, struct cci_devfreq,
> + opp_nb);
> + unsigned long freq, volt;
> +
> + if (event == OPP_EVENT_ADJUST_VOLTAGE) {
> + freq = dev_pm_opp_get_freq(opp);
> + /* current opp item is changed */
> + if (freq == cci_df->old_freq) {
> + volt = dev_pm_opp_get_voltage(opp);
> + mtk_cci_set_voltage(cci_df, volt);
> + }
> + }
> +
> + return 0;
> +}
> +
> static struct devfreq_dev_profile cci_devfreq_profile = {
> .target = mtk_cci_devfreq_target,
> };
> @@ -98,12 +119,15 @@ static int mtk_cci_devfreq_probe(struct platform_device *pdev)
> struct device *cci_dev = &pdev->dev;
> struct cci_devfreq *cci_df;
> struct devfreq_passive_data *passive_data;
> + struct notifier_block *opp_nb;
> int ret;
>
> cci_df = devm_kzalloc(cci_dev, sizeof(*cci_df), GFP_KERNEL);
> if (!cci_df)
> return -ENOMEM;
>
> + opp_nb = &cci_df->opp_nb;
Just move this code at the neighborhood of 'opp_nb->notifier_call' init code.
> +
> cci_df->cci_clk = devm_clk_get(cci_dev, "cci_clock");
> ret = PTR_ERR_OR_ZERO(cci_df->cci_clk);
> if (ret) {
> @@ -152,6 +176,9 @@ static int mtk_cci_devfreq_probe(struct platform_device *pdev)
> goto err_opp;
> }
>
> + opp_nb->notifier_call = ccidevfreq_opp_notifier;
> + dev_pm_opp_register_notifier(cci_dev, opp_nb);
Need to check whether return value is valid or not.
> +
> return 0;
>
> err_opp:
>
--
Best Regards,
Chanwoo Choi
Samsung Electronics
next prev parent reply other threads:[~2021-03-25 7:55 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <1616499241-4906-1-git-send-email-andrew-sh.cheng@mediatek.com>
[not found] ` <CGME20210323113411epcas1p3b4367563007ca91c30201d7fc225bb67@epcas1p3.samsung.com>
[not found] ` <1616499241-4906-2-git-send-email-andrew-sh.cheng@mediatek.com>
2021-03-25 7:42 ` [PATCH V8 1/8] PM / devfreq: Add cpu based scaling support to passive_governor Chanwoo Choi
2021-03-25 8:14 ` Chanwoo Choi
[not found] ` <1617177820.15067.1.camel@mtksdaap41>
2021-03-31 8:27 ` Chanwoo Choi
2021-03-31 8:35 ` Chanwoo Choi
[not found] ` <1617195800.18432.3.camel@mtksdaap41>
2021-04-01 0:16 ` Chanwoo Choi
2021-04-08 2:47 ` Chanwoo Choi
[not found] ` <1621995727.29827.1.camel@mtksdaap41>
2021-05-26 3:08 ` Chanwoo Choi
[not found] ` <1622431376.14423.5.camel@mtksdaap41>
2021-05-31 7:56 ` Chanwoo Choi
[not found] ` <CACb=7PUkpMkDOJ6dDHXhJ5ep4e9u8ZVYM8M2iC-iwHXn13t3DQ@mail.gmail.com>
2021-05-31 8:13 ` Chanwoo Choi
2021-03-31 10:46 ` Hsin-Yi Wang
[not found] ` <CGME20210323113411epcas1p3dcc8649a2e3bed66866e3470d7aab447@epcas1p3.samsung.com>
[not found] ` <1616499241-4906-5-git-send-email-andrew-sh.cheng@mediatek.com>
2021-03-25 8:04 ` [PATCH V8 4/8] devfreq: add mediatek cci devfreq Chanwoo Choi
[not found] ` <CGME20210323113413epcas1p1d3acc9ac2539da96b0757a0159bdcfc7@epcas1p1.samsung.com>
[not found] ` <1616499241-4906-8-git-send-email-andrew-sh.cheng@mediatek.com>
2021-03-25 8:11 ` Chanwoo Choi [this message]
[not found] ` <1616499241-4906-3-git-send-email-andrew-sh.cheng@mediatek.com>
2021-03-30 4:36 ` [PATCH V8 2/8] cpufreq: mediatek: Enable clock and regulator Viresh Kumar
[not found] ` <1617168099.18405.8.camel@mtksdaap41>
2021-03-31 6:17 ` Viresh Kumar
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