From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.0 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_PASS autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id E3E3AC43381 for ; Tue, 26 Mar 2019 11:24:33 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id AE35C206C0 for ; Tue, 26 Mar 2019 11:24:33 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1731339AbfCZLYc (ORCPT ); Tue, 26 Mar 2019 07:24:32 -0400 Received: from mx07-00178001.pphosted.com ([62.209.51.94]:4528 "EHLO mx07-00178001.pphosted.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726175AbfCZLYc (ORCPT ); Tue, 26 Mar 2019 07:24:32 -0400 Received: from pps.filterd (m0046037.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.16.0.27/8.16.0.27) with SMTP id x2QBBSwh028861; Tue, 26 Mar 2019 12:24:19 +0100 Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-00178001.pphosted.com with ESMTP id 2rddh7h4qv-1 (version=TLSv1 cipher=ECDHE-RSA-AES256-SHA bits=256 verify=NOT); Tue, 26 Mar 2019 12:24:19 +0100 Received: from zeta.dmz-eu.st.com (zeta.dmz-eu.st.com [164.129.230.9]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 5E25A3A; Tue, 26 Mar 2019 11:24:18 +0000 (GMT) Received: from Webmail-eu.st.com (sfhdag3node2.st.com [10.75.127.8]) by zeta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 295B1557B; Tue, 26 Mar 2019 11:24:18 +0000 (GMT) Received: from [10.48.0.204] (10.75.127.50) by SFHDAG3NODE2.st.com (10.75.127.8) with Microsoft SMTP Server (TLS) id 15.0.1347.2; Tue, 26 Mar 2019 12:24:17 +0100 Subject: Re: [PATCH v2 3/3] ARM: dts: stm32: Add clock on stm32mp157c syscfg To: Fabrice Gasnier , , CC: , , , , , , , References: <1544604495-4082-1-git-send-email-fabrice.gasnier@st.com> <1544604495-4082-4-git-send-email-fabrice.gasnier@st.com> From: Alexandre Torgue Message-ID: <6f731c00-8430-0459-2d8c-1e250a3d20fb@st.com> Date: Tue, 26 Mar 2019 12:24:02 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.5.1 MIME-Version: 1.0 In-Reply-To: <1544604495-4082-4-git-send-email-fabrice.gasnier@st.com> Content-Type: text/plain; charset="utf-8"; format=flowed Content-Language: en-US Content-Transfer-Encoding: 7bit X-Originating-IP: [10.75.127.50] X-ClientProxiedBy: SFHDAG4NODE3.st.com (10.75.127.12) To SFHDAG3NODE2.st.com (10.75.127.8) X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:,, definitions=2019-03-26_08:,, signatures=0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Fabrice On 12/12/18 9:48 AM, Fabrice Gasnier wrote: > STM32 syscfg needs a clock to access registers. > > Signed-off-by: Fabrice Gasnier > --- > arch/arm/boot/dts/stm32mp157c.dtsi | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/arch/arm/boot/dts/stm32mp157c.dtsi b/arch/arm/boot/dts/stm32mp157c.dtsi > index 8bf1c17..61b2a70 100644 > --- a/arch/arm/boot/dts/stm32mp157c.dtsi > +++ b/arch/arm/boot/dts/stm32mp157c.dtsi > @@ -820,6 +820,7 @@ > syscfg: syscon@50020000 { > compatible = "st,stm32mp157-syscfg", "syscon"; > reg = <0x50020000 0x400>; > + clocks = <&rcc SYSCFG>; > }; > > lptimer2: timer@50021000 { > For the DT patch: Applied on stm32-next. Thanks. Alex