Re: [PATCH v1 1/3] clk: qcom: gcc: Add support for a new frequency for SC7180

[Taniya Das <tdas@codeaurora.org>]

Hello Stephen,

Thanks for your review.

On 3/16/2020 11:19 PM, Stephen Boyd wrote:
> Quoting Taniya Das (2020-03-16 03:54:40)
>> There is a requirement to support 51.2MHz from GPLL6 for qup clocks,
>> thus update the frequency table and parent data/map to use the GPLL6
>> source PLL.
>>
>> Signed-off-by: Taniya Das <tdas@codeaurora.org>
>> ---
> 
> Any Fixes: tag for this? I guess the beginning of this driver being
> introduced?
> 

Sure, will add the same.

>>   drivers/clk/qcom/gcc-sc7180.c | 73 ++++++++++++++++++++++---------------------
>>   1 file changed, 37 insertions(+), 36 deletions(-)
>>
>> diff --git a/drivers/clk/qcom/gcc-sc7180.c b/drivers/clk/qcom/gcc-sc7180.c
>> index 7f59fb8..ad75847 100644
>> --- a/drivers/clk/qcom/gcc-sc7180.c
>> +++ b/drivers/clk/qcom/gcc-sc7180.c
>> @@ -405,8 +406,8 @@ static const struct freq_tbl ftbl_gcc_qupv3_wrap0_s0_clk_src[] = {
>>
>>   static struct clk_init_data gcc_qupv3_wrap0_s0_clk_src_init = {
>>          .name = "gcc_qupv3_wrap0_s0_clk_src",
>> -       .parent_data = gcc_parent_data_0,
>> -       .num_parents = 4,
>> +       .parent_data = gcc_parent_data_1,
> 
> This should have been done initially. We shouldn't need to describe
> "new" parents when they have always been there. Are there other clks in
> this driver that actually have more parents than we've currently
> described? If so, please fix them.
> 

The auto generation script does not consider to define the parent unless 
it is used in the frequency table to derive a frequency. For now I 
didn't find any other sources missed.

>> +       .num_parents = 5,
> 
> Can you use ARRAY_SIZE(gcc_parent_data_1) instead? That way this isn't a
> hard-coded value.
> 

Yes will take care of it too.

>>          .ops = &clk_rcg2_ops,
>>   };
>>

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