From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id BA27BC433FE for ; Tue, 16 Nov 2021 20:41:34 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id A36DA615E2 for ; Tue, 16 Nov 2021 20:41:34 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231324AbhKPUob (ORCPT ); Tue, 16 Nov 2021 15:44:31 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41182 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231245AbhKPUo2 (ORCPT ); Tue, 16 Nov 2021 15:44:28 -0500 Received: from mail-pj1-x102a.google.com (mail-pj1-x102a.google.com [IPv6:2607:f8b0:4864:20::102a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 27AD6C061570 for ; Tue, 16 Nov 2021 12:41:31 -0800 (PST) Received: by mail-pj1-x102a.google.com with SMTP id iq11so421457pjb.3 for ; Tue, 16 Nov 2021 12:41:31 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=broadcom.com; s=google; h=subject:to:cc:references:from:message-id:date:user-agent :mime-version:in-reply-to; bh=IRnEer3ik49ebg0IV+YdqlubsT6DzyYJd9SL94CGobU=; b=QPHDeMLrLFsFeHRaLWH2O3Ps/aDt8DhtoNebGbmXnBcf8caYUszC9gfffp8jrB+XVG CB9yLCVSeH+GTj4H5ASImT4N4Be3nCDvx61g5b/AZb4y1gN3pGNFGXf0tmYz81F1PKEx /ozdjoRYW0vojMfNgPtRFWSTNDPRC29RsXBgo= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:subject:to:cc:references:from:message-id:date :user-agent:mime-version:in-reply-to; bh=IRnEer3ik49ebg0IV+YdqlubsT6DzyYJd9SL94CGobU=; b=pp0b3tHJmRsRIjRH7N0Z4YTGAHSteQHEt1nq6ZvdDtbN11YkOxbp8+g12GZHDVQKP2 BnSWX7PXPiy5yeFMd809zIaq4EUVLdyNVWwiMVInLciw5ZP8N5UPztWCDxk1qKi83qhD YbvVAgZTWyidAMGV1yS8gX4EpcQb/AJQEfkHwc2FOfNr7nrGewaYXPWjqC3HudKQjLbd m0TDJ7FZRFlSFBW8PT9WsLQu/eOeY4fgvaYzxwRN+hwgU/Ey3bJvKgTz55i3dndgp+/D R4vE9+RQOUETNDLR+KNQpf95KS9vEVQ9hizoUDvHxXkHfstz553QBlmCnEck1dksQzjB fa9g== X-Gm-Message-State: AOAM53189qszAPRNuGBbsat/eaABpGZnB9nADtMFd54PBVy45qG3I9aX JRlxOblaZ+X1O0N2CvWgebZgcA== X-Google-Smtp-Source: ABdhPJxLqN9Vtnv9bBxe0+y4tRAazp4wBYe7ulDb2n+AUkfPjseSXv/txLf2GpMa8YO6XI/2lxMANQ== X-Received: by 2002:a17:903:1d2:b0:142:24f1:1213 with SMTP id e18-20020a17090301d200b0014224f11213mr48905053plh.81.1637095290626; Tue, 16 Nov 2021 12:41:30 -0800 (PST) Received: from [10.67.48.245] ([192.19.223.252]) by smtp.gmail.com with ESMTPSA id h196sm2953502pfe.216.2021.11.16.12.41.29 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 16 Nov 2021 12:41:29 -0800 (PST) Subject: Re: [PATCH v2 1/1] PCI: brcmstb: Use BIT() as __GENMASK() is for internal use only To: Rob Herring , Andy Shevchenko , Marc Zyngier Cc: Robin Murphy , bcm-kernel-feedback-list , linux-rpi-kernel , linux-arm Mailing List , linux-pci , Linux Kernel Mailing List , Jim Quinlan , Nicolas Saenz Julienne , Florian Fainelli , Lorenzo Pieralisi , =?UTF-8?Q?Krzysztof_Wilczy=c5=84ski?= , Bjorn Helgaas References: <20211115112000.23693-1-andriy.shevchenko@linux.intel.com> <94d3f4e5-a698-134c-8264-55d31d3eafa6@arm.com> From: Florian Fainelli Message-ID: <71a90592-99bb-13e1-a671-eb19c2dad3da@broadcom.com> Date: Tue, 16 Nov 2021 12:41:28 -0800 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.13.0 MIME-Version: 1.0 In-Reply-To: Content-Type: multipart/signed; protocol="application/pkcs7-signature"; micalg=sha-256; boundary="00000000000047303805d0edf3e7" Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org --00000000000047303805d0edf3e7 Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 8bit On 11/16/21 10:20 AM, Rob Herring wrote: > +Marc Z > > On Mon, Nov 15, 2021 at 8:39 AM Andy Shevchenko > wrote: >> >> On Mon, Nov 15, 2021 at 04:14:21PM +0200, Andy Shevchenko wrote: >>> On Mon, Nov 15, 2021 at 4:01 PM Robin Murphy wrote: >>>> On 2021-11-15 11:20, Andy Shevchenko wrote: >>>>> Use BIT() as __GENMASK() is for internal use only. The rationale >>>>> of switching to BIT() is to provide better generated code. The >>>>> GENMASK() against non-constant numbers may produce an ugly assembler >>>>> code. On contrary the BIT() is simply converted to corresponding shift >>>>> operation. >>>> >>>> FWIW, If you care about code quality and want the compiler to do the >>>> obvious thing, why not specify it as the obvious thing: >>>> >>>> u32 val = ~0 << msi->legacy_shift; >>> >>> Obvious and buggy (from the C standard point of view)? :-) >> >> Forgot to mention that BIT() is also makes it easy to avoid such mistake. >> >>>> Personally I don't think that abusing BIT() in the context of setting >>>> multiple bits is any better than abusing __GENMASK()... >>> >>> No, BIT() is not abused here, but __GENMASK(). >>> >>> After all it's up to you, folks, consider that as a bug report. > > Couldn't we get rid of legacy_shift entirely if the legacy case sets > up 'hwirq' as 24-31 rather than 0-7? Though the data for the MSI msg > uses the hwirq. I personally find it clearer and easier to reason about with the current code though I suppose that with an appropriate xlate method we could sort of set up the hwirq the way we want them to be to avoid any shifting in brcm_pcie_msi_isr(). -- Florian --00000000000047303805d0edf3e7 Content-Type: application/pkcs7-signature; name="smime.p7s" Content-Transfer-Encoding: base64 Content-Disposition: attachment; filename="smime.p7s" Content-Description: S/MIME Cryptographic Signature MIIQeQYJKoZIhvcNAQcCoIIQajCCEGYCAQExDzANBglghkgBZQMEAgEFADALBgkqhkiG9w0BBwGg gg3QMIIFDTCCA/WgAwIBAgIQeEqpED+lv77edQixNJMdADANBgkqhkiG9w0BAQsFADBMMSAwHgYD VQQLExdHbG9iYWxTaWduIFJvb3QgQ0EgLSBSMzETMBEGA1UEChMKR2xvYmFsU2lnbjETMBEGA1UE AxMKR2xvYmFsU2lnbjAeFw0yMDA5MTYwMDAwMDBaFw0yODA5MTYwMDAwMDBaMFsxCzAJBgNVBAYT AkJFMRkwFwYDVQQKExBHbG9iYWxTaWduIG52LXNhMTEwLwYDVQQDEyhHbG9iYWxTaWduIEdDQyBS MyBQZXJzb25hbFNpZ24gMiBDQSAyMDIwMIIBIjANBgkqhkiG9w0BAQEFAAOCAQ8AMIIBCgKCAQEA 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