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From: Sandipan Das <sandipan.das@amd.com>
To: <linux-kernel@vger.kernel.org>,
	<linux-perf-users@vger.kernel.org>, <x86@kernel.org>
Cc: <peterz@infradead.org>, <bp@alien8.de>,
	<dave.hansen@linux.intel.com>, <acme@kernel.org>,
	<mark.rutland@arm.com>, <alexander.shishkin@linux.intel.com>,
	<namhyung@kernel.org>, <jolsa@kernel.org>, <tglx@linutronix.de>,
	<mingo@redhat.com>, <pbonzini@redhat.com>, <jmattson@google.com>,
	<like.xu.linux@gmail.com>, <eranian@google.com>,
	<ananth.narayan@amd.com>, <ravi.bangoria@amd.com>,
	<santosh.shukla@amd.com>, <sandipan.das@amd.com>
Subject: [PATCH 4/7] perf/x86/amd/core: Detect available counters
Date: Thu, 17 Mar 2022 11:58:33 +0530	[thread overview]
Message-ID: <7393a62ef0489c4b86034c68ff8e11bc97456385.1647498015.git.sandipan.das@amd.com> (raw)
In-Reply-To: <cover.1647498015.git.sandipan.das@amd.com>

If AMD Performance Monitoring Version 2 (PerfMonV2) is
supported, use CPUID Fn80000022[EBX] to detect the number
of Core PMCs. This offers more flexibility if the counts
change across processor families.

Signed-off-by: Sandipan Das <sandipan.das@amd.com>
---
 arch/x86/events/amd/core.c        | 5 +++++
 arch/x86/include/asm/perf_event.h | 8 ++++++++
 2 files changed, 13 insertions(+)

diff --git a/arch/x86/events/amd/core.c b/arch/x86/events/amd/core.c
index a074af97faa9..05d79afe5173 100644
--- a/arch/x86/events/amd/core.c
+++ b/arch/x86/events/amd/core.c
@@ -980,9 +980,14 @@ static int __init amd_core_pmu_init(void)
 
 	/* Check for Performance Monitoring v2 support */
 	if (boot_cpu_has(X86_FEATURE_PERFMON_V2)) {
+		int ebx = cpuid_ebx(EXT_PERFMON_DEBUG_FEATURES);
+
 		/* Update PMU version for later usage */
 		x86_pmu.version = 2;
 
+		/* Find the number of available Core PMCs */
+		x86_pmu.num_counters = EXT_PERFMON_DEBUG_NUM_CORE_PMC(ebx);
+
 		amd_pmu_global_cntr_mask = (1ULL << x86_pmu.num_counters) - 1;
 	}
 
diff --git a/arch/x86/include/asm/perf_event.h b/arch/x86/include/asm/perf_event.h
index 8fc1b5003713..d7dfef3e998d 100644
--- a/arch/x86/include/asm/perf_event.h
+++ b/arch/x86/include/asm/perf_event.h
@@ -365,6 +365,14 @@ struct pebs_xmm {
 	u64 xmm[16*2];	/* two entries for each register */
 };
 
+/*
+ * AMD Extended Performance Monitoring and Debug cpuid feature detection
+ */
+#define EXT_PERFMON_DEBUG_FEATURES		0x80000022
+
+/* Extended Performance Monitoring and Debug EBX feature bits */
+#define EXT_PERFMON_DEBUG_NUM_CORE_PMC(ebx)	((ebx) & GENMASK(3, 0))
+
 /*
  * IBS cpuid feature detection
  */
-- 
2.32.0


  parent reply	other threads:[~2022-03-17  6:30 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-03-17  6:28 [PATCH 0/7] perf/x86/amd/core: Add AMD PerfMonV2 support Sandipan Das
2022-03-17  6:28 ` [PATCH 1/7] x86/cpufeatures: Add PerfMonV2 feature bit Sandipan Das
2022-03-17  6:28 ` [PATCH 2/7] x86/msr: Add PerfCntrGlobal* registers Sandipan Das
2022-03-17 11:25   ` Peter Zijlstra
2022-03-17  6:28 ` [PATCH 3/7] perf/x86/amd/core: Detect PerfMonV2 support Sandipan Das
2022-03-17 11:27   ` Peter Zijlstra
2022-03-17  6:28 ` Sandipan Das [this message]
2022-03-17 11:32   ` [PATCH 4/7] perf/x86/amd/core: Detect available counters Peter Zijlstra
2022-03-17  6:28 ` [PATCH 5/7] perf/x86/amd/core: Add PerfMonV2 counter control Sandipan Das
2022-03-17 11:46   ` Peter Zijlstra
2022-03-18  8:02     ` Sandipan Das
2022-03-18 10:52       ` Peter Zijlstra
2022-03-17  6:28 ` [PATCH 6/7] perf/x86/amd/core: Add PerfMonV2 overflow handling Sandipan Das
2022-03-17 12:01   ` Peter Zijlstra
2022-03-17 17:45     ` Stephane Eranian
2022-03-18  8:18     ` Sandipan Das
2022-03-22  7:06   ` Like Xu
2022-03-22  8:37     ` Sandipan Das
2022-03-17  6:28 ` [PATCH 7/7] kvm: x86/cpuid: Fix Architectural Performance Monitoring support Sandipan Das
2022-03-17 12:07   ` Peter Zijlstra
2022-03-18  7:59     ` Sandipan Das
2022-03-22  7:31   ` Like Xu

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