From: Tal Gilboa <talgi@mellanox.com>
To: "Alex G." <mr.nuke.me@gmail.com>,
Jakub Kicinski <jakub.kicinski@netronome.com>
Cc: "linux-pci@vger.kernel.org" <linux-pci@vger.kernel.org>,
"bhelgaas@google.com" <bhelgaas@google.com>,
"keith.busch@intel.com" <keith.busch@intel.com>,
"alex_gagniuc@dellteam.com" <alex_gagniuc@dellteam.com>,
"austin_bolen@dell.com" <austin_bolen@dell.com>,
"shyam_iyer@dell.com" <shyam_iyer@dell.com>,
"jeffrey.t.kirsher@intel.com" <jeffrey.t.kirsher@intel.com>,
"ariel.elior@cavium.com" <ariel.elior@cavium.com>,
"michael.chan@broadcom.com" <michael.chan@broadcom.com>,
"ganeshgr@chelsio.com" <ganeshgr@chelsio.com>,
Tariq Toukan <tariqt@mellanox.com>,
"airlied@gmail.com" <airlied@gmail.com>,
"alexander.deucher@amd.com" <alexander.deucher@amd.com>,
"mike.marciniszyn@intel.com" <mike.marciniszyn@intel.com>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH v5] PCI: Check for PCIe downtraining conditions
Date: Sun, 5 Aug 2018 10:05:10 +0300 [thread overview]
Message-ID: <7424c5ba-ae44-3d8d-9dd5-360e17b6e3b9@mellanox.com> (raw)
In-Reply-To: <1b914780-e342-6aee-ffb2-ef81ac3ddd29@gmail.com>
On 7/31/2018 6:10 PM, Alex G. wrote:
> On 07/31/2018 01:40 AM, Tal Gilboa wrote:
> [snip]
>>>>> @@ -2240,6 +2258,9 @@ static void pci_init_capabilities(struct
>>>>> pci_dev *dev)
>>>>> /* Advanced Error Reporting */
>>>>> pci_aer_init(dev);
>>>>> + /* Check link and detect downtrain errors */
>>>>> + pcie_check_upstream_link(dev);
>>>
>>> This is called for every PCIe device right? Won't there be a
>>> duplicated print in case a device loads with lower PCIe bandwidth
>>> than needed?
>>
>> Alex, can you comment on this please?
>
> Of course I can.
>
> There's one print at probe() time, which happens if bandwidth < max. I
> would think that's fine. There is a way to duplicate it, and that is if
> the driver also calls print_link_status(). A few driver maintainers who
> call it have indicated they'd be fine with removing it from the driver,
> and leaving it in the core PCI.
We would be fine with that as well. Please include the removal in your
patches.
>
> Should the device come back at low speed, go away, then come back at
> full speed we'd still only see one print from the first probe. Again, if
> driver doesn't also call the function.
> There's the corner case where the device come up at < max, goes away,
> then comes back faster, but still < max. There will be two prints, but
> they won't be true duplicates -- each one will indicate different BW.
This is fine.
>
> Alex
>
>>>>> +
>>>>> if (pci_probe_reset_function(dev) == 0)
>>>>> dev->reset_fn = 1;
>>>>> }
>>>>> diff --git a/include/linux/pci.h b/include/linux/pci.h
>>>>> index abd5d5e17aee..15bfab8f7a1b 100644
>>>>> --- a/include/linux/pci.h
>>>>> +++ b/include/linux/pci.h
>>>>> @@ -1088,6 +1088,7 @@ int pcie_set_mps(struct pci_dev *dev, int mps);
>>>>> u32 pcie_bandwidth_available(struct pci_dev *dev, struct pci_dev
>>>>> **limiting_dev,
>>>>> enum pci_bus_speed *speed,
>>>>> enum pcie_link_width *width);
>>>>> +void __pcie_print_link_status(struct pci_dev *dev, bool verbose);
>>>>> void pcie_print_link_status(struct pci_dev *dev);
>>>>> int pcie_flr(struct pci_dev *dev);
>>>>> int __pci_reset_function_locked(struct pci_dev *dev);
>>>>
next prev parent reply other threads:[~2018-08-05 7:05 UTC|newest]
Thread overview: 47+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-06-04 15:55 [PATCH v3] PCI: Check for PCIe downtraining conditions Alexandru Gagniuc
2018-06-05 12:27 ` Andy Shevchenko
2018-06-05 13:04 ` Andy Shevchenko
2018-07-16 21:17 ` Bjorn Helgaas
2018-07-16 22:28 ` Alex_Gagniuc
2018-07-18 21:53 ` Bjorn Helgaas
2018-07-19 15:46 ` Alex G.
2018-07-23 20:01 ` [PATCH v2] PCI/AER: Do not clear AER bits if we don't own AER Alexandru Gagniuc
2018-07-25 1:24 ` kbuild test robot
2018-07-23 20:03 ` [PATCH v5] PCI: Check for PCIe downtraining conditions Alexandru Gagniuc
2018-07-23 21:01 ` Jakub Kicinski
2018-07-23 21:52 ` Tal Gilboa
2018-07-23 22:14 ` Jakub Kicinski
2018-07-23 23:59 ` Alex G.
2018-07-24 13:39 ` Tal Gilboa
2018-07-30 23:26 ` Alex_Gagniuc
2018-07-31 6:40 ` Tal Gilboa
2018-07-31 15:10 ` Alex G.
2018-08-05 7:05 ` Tal Gilboa [this message]
2018-08-06 18:39 ` Alex_Gagniuc
2018-08-06 19:46 ` Bjorn Helgaas
2018-08-06 23:25 ` [PATCH v6 1/9] " Alexandru Gagniuc
2018-08-06 23:25 ` [PATCH v6 2/9] bnx2x: Do not call pcie_print_link_status() Alexandru Gagniuc
2018-08-06 23:25 ` [PATCH v6 3/9] bnxt_en: " Alexandru Gagniuc
2018-08-06 23:25 ` [PATCH v6 4/9] cxgb4: " Alexandru Gagniuc
2018-08-06 23:25 ` [PATCH v6 5/9] fm10k: " Alexandru Gagniuc
2018-08-07 17:52 ` Jeff Kirsher
2018-08-06 23:25 ` [PATCH v6 6/9] ixgbe: " Alexandru Gagniuc
2018-08-07 17:51 ` Jeff Kirsher
2018-08-06 23:25 ` [PATCH v6 7/9] net/mlx4: " Alexandru Gagniuc
2018-08-08 6:10 ` Leon Romanovsky
2018-08-06 23:25 ` [PATCH v6 8/9] net/mlx5: " Alexandru Gagniuc
2018-08-08 6:08 ` Leon Romanovsky
2018-08-08 14:23 ` Tal Gilboa
2018-08-08 15:41 ` Leon Romanovsky
2018-08-08 15:56 ` Tal Gilboa
2018-08-08 16:33 ` Alex G.
2018-08-08 17:27 ` Leon Romanovsky
2018-08-09 14:02 ` Bjorn Helgaas
2018-08-06 23:25 ` [PATCH v6 9/9] nfp: " Alexandru Gagniuc
2018-08-07 19:44 ` [PATCH v6 1/9] PCI: Check for PCIe downtraining conditions David Miller
2018-08-07 21:41 ` Bjorn Helgaas
2018-07-18 13:38 ` [PATCH v3] " Tal Gilboa
2018-07-19 15:49 ` Alex G.
2018-07-23 5:21 ` Tal Gilboa
2018-07-23 17:01 ` Alex G.
2018-07-23 21:35 ` Tal Gilboa
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