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From: Christophe Leroy <christophe.leroy@csgroup.eu>
To: Benjamin Herrenschmidt <benh@kernel.crashing.org>,
	Paul Mackerras <paulus@samba.org>,
	Michael Ellerman <mpe@ellerman.id.au>
Cc: linux-kernel@vger.kernel.org, linuxppc-dev@lists.ozlabs.org
Subject: [PATCH v2 3/9] powerpc/mem: Remove address argument to flush_coherent_icache()
Date: Thu,  8 Apr 2021 15:30:27 +0000 (UTC)	[thread overview]
Message-ID: <742b6360ae4f344a1c6ecfadcf3b6645f443fa7a.1617895813.git.christophe.leroy@csgroup.eu> (raw)
In-Reply-To: <7bf6f1600acad146e541a4e220940062f2e5b03d.1617895813.git.christophe.leroy@csgroup.eu>

flush_coherent_icache() can use any valid address as mentionned
by the comment.

Use PAGE_OFFSET as base address. This allows removing the
user access stuff.

Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
---
 arch/powerpc/mm/cacheflush.c | 13 +++++--------
 1 file changed, 5 insertions(+), 8 deletions(-)

diff --git a/arch/powerpc/mm/cacheflush.c b/arch/powerpc/mm/cacheflush.c
index 742d3e0fb12f..dc2d39da6f63 100644
--- a/arch/powerpc/mm/cacheflush.c
+++ b/arch/powerpc/mm/cacheflush.c
@@ -5,10 +5,9 @@
 
 /**
  * flush_coherent_icache() - if a CPU has a coherent icache, flush it
- * @addr: The base address to use (can be any valid address, the whole cache will be flushed)
  * Return true if the cache was flushed, false otherwise
  */
-static inline bool flush_coherent_icache(unsigned long addr)
+static inline bool flush_coherent_icache(void)
 {
 	/*
 	 * For a snooping icache, we still need a dummy icbi to purge all the
@@ -18,9 +17,7 @@ static inline bool flush_coherent_icache(unsigned long addr)
 	 */
 	if (cpu_has_feature(CPU_FTR_COHERENT_ICACHE)) {
 		mb(); /* sync */
-		allow_read_from_user((const void __user *)addr, L1_CACHE_BYTES);
-		icbi((void *)addr);
-		prevent_read_from_user((const void __user *)addr, L1_CACHE_BYTES);
+		icbi((void *)PAGE_OFFSET);
 		mb(); /* sync */
 		isync();
 		return true;
@@ -60,7 +57,7 @@ static void invalidate_icache_range(unsigned long start, unsigned long stop)
  */
 void flush_icache_range(unsigned long start, unsigned long stop)
 {
-	if (flush_coherent_icache(start))
+	if (flush_coherent_icache())
 		return;
 
 	clean_dcache_range(start, stop);
@@ -146,7 +143,7 @@ static void __flush_dcache_icache(void *p)
 {
 	unsigned long addr = (unsigned long)p;
 
-	if (flush_coherent_icache(addr))
+	if (flush_coherent_icache())
 		return;
 
 	clean_dcache_range(addr, addr + PAGE_SIZE);
@@ -200,7 +197,7 @@ void flush_dcache_icache_page(struct page *page)
 	} else {
 		unsigned long addr = page_to_pfn(page) << PAGE_SHIFT;
 
-		if (flush_coherent_icache(addr))
+		if (flush_coherent_icache())
 			return;
 		flush_dcache_icache_phys(addr);
 	}
-- 
2.25.0


  parent reply	other threads:[~2021-04-08 15:30 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-04-08 15:30 [PATCH v2 1/9] powerpc/mem: Move cache flushing functions into mm/cacheflush.c Christophe Leroy
2021-04-08 15:30 ` [PATCH v2 2/9] powerpc/mem: Declare __flush_dcache_icache() static Christophe Leroy
2021-04-08 15:30 ` Christophe Leroy [this message]
2021-04-08 15:30 ` [PATCH v2 4/9] powerpc/mem: Call flush_coherent_icache() at higher level Christophe Leroy
2021-04-08 15:30 ` [PATCH v2 5/9] powerpc/mem: Optimise flush_dcache_icache_hugepage() Christophe Leroy
2021-04-08 15:30 ` [PATCH v2 6/9] powerpc/mem: flush_dcache_icache_phys() is for HIGHMEM pages only Christophe Leroy
2021-04-08 15:30 ` [PATCH v2 7/9] powerpc/mem: Help GCC realise __flush_dcache_icache() flushes single pages Christophe Leroy
2021-04-08 15:30 ` [PATCH v2 8/9] powerpc/mem: Inline flush_dcache_page() Christophe Leroy
2021-04-08 15:30 ` [PATCH v2 9/9] powerpc/mem: Use kmap_local_page() in flushing functions Christophe Leroy
2021-04-19  4:00 ` [PATCH v2 1/9] powerpc/mem: Move cache flushing functions into mm/cacheflush.c Michael Ellerman

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