From: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
To: Dinh Nguyen <dinguyen@kernel.org>,
"Paul J. Murphy" <paul.j.murphy@intel.com>,
Daniele Alessandrelli <daniele.alessandrelli@intel.com>,
Rob Herring <robh+dt@kernel.org>,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
arm@kernel.org, soc@kernel.org, Arnd Bergmann <arnd@arndb.de>,
Olof Johansson <olof@lixom.net>
Cc: Krzysztof Kozlowski <krzk@kernel.org>
Subject: Re: [PATCH v2] arm64: defconfig: enable Intel's eASIC N5X SoCFPGA and Keem Bay SoC
Date: Tue, 9 Mar 2021 10:29:01 +0100 [thread overview]
Message-ID: <7462eeec-5c4e-b4d5-cf94-9945042fc1d1@canonical.com> (raw)
In-Reply-To: <776e0c26-4f05-2a3c-1536-f730b9109b1b@kernel.org>
On 08/03/2021 20:07, Dinh Nguyen wrote:
> Hi Krzysztof,
>
> On 3/8/21 11:48 AM, Krzysztof Kozlowski wrote:
>> From: Krzysztof Kozlowski <krzk@kernel.org>
>>
>> Enable in defconfig two Intel ARM64 architectures: the eASIC N5X SoCFPGA
>> and Keem Bay SoC. This allows compile coverage when building default
>> config.
>>
>> For the N5X (and Agilex) enable also DesignWare SPI controller in MMIO.
>>
>> Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
>>
>> ---
>>
>> Hi Arnd,
>>
>> You asked me to check if all drivers are enabled for these platforms.
>> In general the answer is yes. In particular:
>> 1. Keem Bay is does not have much in upstream, but everything described
>> in DTS is there,
>> 2. N5X shares a lot with Agilex SoCFPGA which already (mostly) is
>> supported.
>>
>> Changes since v1:
>> 1. Enable also SPI_DW_MMIO
>> ---
>> arch/arm64/configs/defconfig | 5 +++++
>> 1 file changed, 5 insertions(+)
>>
>> diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
>> index d612f633b771..9f9adcb8b0e9 100644
>> --- a/arch/arm64/configs/defconfig
>> +++ b/arch/arm64/configs/defconfig
>> @@ -29,6 +29,7 @@ CONFIG_KALLSYMS_ALL=y
>> CONFIG_PROFILING=y
>> CONFIG_ARCH_ACTIONS=y
>> CONFIG_ARCH_AGILEX=y
>> +CONFIG_ARCH_N5X=y
>
> I just submitted a patch for this as well. From the looks of the
> defconfig file, it looks like the platforms are in alphabetical order,
> but then I see that ARCH_SUNXI is not in it's correct spot if there is a
> rule for keeping things in alphabetical order.
>
The rule is that order comes from savedefconfig, not alphabetical. This
way you avoid reshuffling of symbols on any future savedefconfig.
Best regards,
Krzysztof
next prev parent reply other threads:[~2021-03-09 9:29 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-03-08 17:48 [PATCH v2] arm64: defconfig: enable Intel's eASIC N5X SoCFPGA and Keem Bay SoC Krzysztof Kozlowski
[not found] ` <776e0c26-4f05-2a3c-1536-f730b9109b1b@kernel.org>
2021-03-09 9:29 ` Krzysztof Kozlowski [this message]
[not found] ` <73dafebf-5c47-5d90-e29e-e1811f370a54@kernel.org>
2021-03-09 15:19 ` Arnd Bergmann
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