From: Lukasz Luba <l.luba@partner.samsung.com>
To: Krzysztof Kozlowski <krzk@kernel.org>
Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-pm@vger.kernel.org, linux-samsung-soc@vger.kernel.org,
linux-arm-kernel@lists.infradead.org, b.zolnierkie@samsung.com,
kgene@kernel.org, mark.rutland@arm.com, cw00.choi@samsung.com,
kyungmin.park@samsung.com, m.szyprowski@samsung.com,
s.nawrocki@samsung.com, myungjoo.ham@samsung.com,
robh+dt@kernel.org, willy.mh.wolff.ml@gmail.com
Subject: Re: [PATCH v2 1/4] dt-bindings: memory-controllers: Add Exynos5422 DMC interrupts description
Date: Tue, 1 Oct 2019 17:58:52 +0200 [thread overview]
Message-ID: <74f31100-7503-e333-fa51-ca218b45bb98@partner.samsung.com> (raw)
In-Reply-To: <20191001131807.GB30129@pi3>
On 10/1/19 3:18 PM, Krzysztof Kozlowski wrote:
> On Tue, Oct 01, 2019 at 02:54:33PM +0200, Lukasz Luba wrote:
>> Add description for optional interrupt lines. It provides a new operation
>> mode, which uses internal performance counters interrupt when overflow.
>> This is more reliable than using default polling mode implemented in
>> devfreq.
>>
>> Signed-off-by: Lukasz Luba <l.luba@partner.samsung.com>
>> ---
>> .../bindings/memory-controllers/exynos5422-dmc.txt | 10 ++++++++++
>> 1 file changed, 10 insertions(+)
>>
>> diff --git a/Documentation/devicetree/bindings/memory-controllers/exynos5422-dmc.txt b/Documentation/devicetree/bindings/memory-controllers/exynos5422-dmc.txt
>> index 02aeb3b5a820..afc38aea6b1c 100644
>> --- a/Documentation/devicetree/bindings/memory-controllers/exynos5422-dmc.txt
>> +++ b/Documentation/devicetree/bindings/memory-controllers/exynos5422-dmc.txt
>> @@ -31,6 +31,13 @@ Required properties for DMC device for Exynos5422:
>> The register offsets are in the driver code and specyfic for this SoC
>> type.
>>
>> +Optional properties for DMC device for Exynos5422:
>> +- interrupt-parent : The parent interrupt controller.
>> +- interrupts : Contains the IRQ line numbers for the DMC internal performance
>> + event counters. Align with specification of the interrupt line(s) in the
>> + interrupt-parent controller.
>> +- interrupt-names : List of IRQ names.
>
> Since the names are important (not the order) they are part of the
> bindings and they must be listed here.
Good point, thanks. I will add it to the description.
Regards,
Lukasz
next prev parent reply other threads:[~2019-10-01 16:05 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <CGME20191001125444eucas1p1c31d1492ed64a9417486f471b97eae8c@eucas1p1.samsung.com>
2019-10-01 12:54 ` [PATCH v2 0/4] Exynos5 DMC interrupt mode Lukasz Luba
[not found] ` <CGME20191001125444eucas1p2e4254acf8434e1fadf0e208dbe62b2d7@eucas1p2.samsung.com>
2019-10-01 12:54 ` [PATCH v2 1/4] dt-bindings: memory-controllers: Add Exynos5422 DMC interrupts description Lukasz Luba
2019-10-01 13:18 ` Krzysztof Kozlowski
2019-10-01 15:58 ` Lukasz Luba [this message]
[not found] ` <CGME20191001125445eucas1p21ea21a92cec96d660994d8d7f91128e0@eucas1p2.samsung.com>
2019-10-01 12:54 ` [PATCH v2 2/4] ARM: dts: exynos: Add interrupt to DMC controller in Exynos5422 Lukasz Luba
[not found] ` <CGME20191001125446eucas1p1fb2ad4c13feac8dfec8d5eeeeec0a64a@eucas1p1.samsung.com>
2019-10-01 12:54 ` [PATCH v2 3/4] ARM: dts: exynos: map 0x10000 SFR instead of 0x100 in DMC Exynos5422 Lukasz Luba
[not found] ` <CGME20191001125447eucas1p229f15daacca52b3df5bfd04b54914fb8@eucas1p2.samsung.com>
2019-10-01 12:54 ` [PATCH v2 4/4] memory: samsung: exynos5422-dmc: Add support for interrupt from performance counters Lukasz Luba
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