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* [PATCH] ARM: dts: zynq: Fix ethernet PHY for v5 schematics
@ 2020-04-20 11:07 Matwey V. Kornilov
  2020-04-20 11:19 ` Michal Simek
  0 siblings, 1 reply; 7+ messages in thread
From: Matwey V. Kornilov @ 2020-04-20 11:07 UTC (permalink / raw)
  To: Rob Herring, Michal Simek,
	open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
	moderated list:ARM/ZYNQ ARCHITECTURE, open list
  Cc: matwey.kornilov, Matwey V. Kornilov,
	open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
	moderated list:ARM/ZYNQ ARCHITECTURE, open list

There are at least two different versions existing for MYIR Zturn:

 * v4 schematics has Atheros AR8035 PHY at 0b000
     http://www.myirtech.com/download/Zynq7000/Z-TURNBOARD_schematic.pdf
 * v5 schematics has Micrel KSZ9031 PHY at 0b011
     v5 schematics available at DVD disk supplied with the board

Specify both PHYs to make ethernet interface working for any board
revision. This commit relies on of_mdiobus_register() behaviour.

Before the patch:

[   28.295002] macb e000b000.ethernet eth0: Could not attach PHY (-19)

After the patch:

[   28.257365] macb e000b000.ethernet eth0: PHY [e000b000.ethernet-ffffffff:00] driver [Micrel KSZ9031 Gigabit PHY] (irq=POLL)
[   28.257384] macb e000b000.ethernet eth0: configuring for phy/rgmii-id link mode

Signed-off-by: Matwey V. Kornilov <matwey@sai.msu.ru>
---
 arch/arm/boot/dts/zynq-zturn.dts | 13 ++++++++++---
 1 file changed, 10 insertions(+), 3 deletions(-)

diff --git a/arch/arm/boot/dts/zynq-zturn.dts b/arch/arm/boot/dts/zynq-zturn.dts
index 5ec616ebca08..07da9cf60d02 100644
--- a/arch/arm/boot/dts/zynq-zturn.dts
+++ b/arch/arm/boot/dts/zynq-zturn.dts
@@ -67,10 +67,17 @@
 &gem0 {
 	status = "okay";
 	phy-mode = "rgmii-id";
-	phy-handle = <&ethernet_phy>;
 
-	ethernet_phy: ethernet-phy@0 {
-		reg = <0x0>;
+	ethernet-phy@0 {
+		compatible = "ethernet-phy-ieee802.3-c22";
+		reg = <0>;
+		max-speed = <1000>;
+	};
+
+	ethernet-phy@3 {
+		compatible = "ethernet-phy-ieee802.3-c22";
+		reg = <3>;
+		max-speed = <1000>;
 	};
 };
 
-- 
2.16.4


^ permalink raw reply related	[flat|nested] 7+ messages in thread

* Re: [PATCH] ARM: dts: zynq: Fix ethernet PHY for v5 schematics
  2020-04-20 11:07 [PATCH] ARM: dts: zynq: Fix ethernet PHY for v5 schematics Matwey V. Kornilov
@ 2020-04-20 11:19 ` Michal Simek
  2020-04-20 11:22   ` Matwey V. Kornilov
  2020-04-28 10:03   ` [PATCH v2] " Matwey V. Kornilov
  0 siblings, 2 replies; 7+ messages in thread
From: Michal Simek @ 2020-04-20 11:19 UTC (permalink / raw)
  To: Matwey V. Kornilov, Rob Herring, Michal Simek,
	open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
	moderated list:ARM/ZYNQ ARCHITECTURE, open list
  Cc: matwey.kornilov, Anton Gerasimov

On 20. 04. 20 13:07, Matwey V. Kornilov wrote:
> There are at least two different versions existing for MYIR Zturn:
> 
>  * v4 schematics has Atheros AR8035 PHY at 0b000
>      http://www.myirtech.com/download/Zynq7000/Z-TURNBOARD_schematic.pdf
>  * v5 schematics has Micrel KSZ9031 PHY at 0b011
>      v5 schematics available at DVD disk supplied with the board
> 
> Specify both PHYs to make ethernet interface working for any board
> revision. This commit relies on of_mdiobus_register() behaviour.

typo - behavior.

I think it will be very useful to describe that current behavior.
Also would be good to test it on v4.

Thanks,
Michal

^ permalink raw reply	[flat|nested] 7+ messages in thread

* Re: [PATCH] ARM: dts: zynq: Fix ethernet PHY for v5 schematics
  2020-04-20 11:19 ` Michal Simek
@ 2020-04-20 11:22   ` Matwey V. Kornilov
  2020-04-28 10:03   ` [PATCH v2] " Matwey V. Kornilov
  1 sibling, 0 replies; 7+ messages in thread
From: Matwey V. Kornilov @ 2020-04-20 11:22 UTC (permalink / raw)
  To: Michal Simek
  Cc: Rob Herring,
	open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
	moderated list:ARM/ZYNQ ARCHITECTURE, open list, Anton Gerasimov

пн, 20 апр. 2020 г. в 14:19, Michal Simek <michal.simek@xilinx.com>:
>
> On 20. 04. 20 13:07, Matwey V. Kornilov wrote:
> > There are at least two different versions existing for MYIR Zturn:
> >
> >  * v4 schematics has Atheros AR8035 PHY at 0b000
> >      http://www.myirtech.com/download/Zynq7000/Z-TURNBOARD_schematic.pdf
> >  * v5 schematics has Micrel KSZ9031 PHY at 0b011
> >      v5 schematics available at DVD disk supplied with the board
> >
> > Specify both PHYs to make ethernet interface working for any board
> > revision. This commit relies on of_mdiobus_register() behaviour.
>
> typo - behavior.
>
> I think it will be very useful to describe that current behavior.
> Also would be good to test it on v4.

I don't have v4 board, so I will highly appreciate if somebody test
the patch with v4 board.

>
> Thanks,
> Michal



-- 
With best regards,
Matwey V. Kornilov.
Sternberg Astronomical Institute, Lomonosov Moscow State University, Russia
119234, Moscow, Universitetsky pr-k 13, +7 (495) 9392382

^ permalink raw reply	[flat|nested] 7+ messages in thread

* [PATCH v2] ARM: dts: zynq: Fix ethernet PHY for v5 schematics
  2020-04-20 11:19 ` Michal Simek
  2020-04-20 11:22   ` Matwey V. Kornilov
@ 2020-04-28 10:03   ` Matwey V. Kornilov
  2020-05-01 16:10     ` Matwey V. Kornilov
  1 sibling, 1 reply; 7+ messages in thread
From: Matwey V. Kornilov @ 2020-04-28 10:03 UTC (permalink / raw)
  To: Rob Herring, Michal Simek,
	open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
	moderated list:ARM/ZYNQ ARCHITECTURE, open list
  Cc: matwey.kornilov, Matwey V. Kornilov,
	open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
	moderated list:ARM/ZYNQ ARCHITECTURE, open list

There are at least two different versions existing for MYIR Zturn:

 * v4 schematics has Atheros AR8035 PHY at 0b000
     http://www.myirtech.com/download/Zynq7000/Z-TURNBOARD_schematic.pdf
 * v5 schematics has Micrel KSZ9031 PHY at 0b011
     v5 schematics available at DVD disk supplied with the board

Specify both PHYs to make ethernet interface working for any board
revision. This commit relies on of_mdiobus_register() behavior.
When phy-handle is missed, every nested PHY node is considered,
while ENODEVs are ignored.

Before the patch:

[   28.295002] macb e000b000.ethernet eth0: Could not attach PHY (-19)

After the patch:

[   28.257365] macb e000b000.ethernet eth0: PHY [e000b000.ethernet-ffffffff:00] driver [Micrel KSZ9031 Gigabit PHY] (irq=POLL)
[   28.257384] macb e000b000.ethernet eth0: configuring for phy/rgmii-id link mode

Signed-off-by: Matwey V. Kornilov <matwey@sai.msu.ru>
---
Changes since v1:
 - reworded commit message

 arch/arm/boot/dts/zynq-zturn.dts | 13 ++++++++++---
 1 file changed, 10 insertions(+), 3 deletions(-)

diff --git a/arch/arm/boot/dts/zynq-zturn.dts b/arch/arm/boot/dts/zynq-zturn.dts
index 5ec616ebca08..07da9cf60d02 100644
--- a/arch/arm/boot/dts/zynq-zturn.dts
+++ b/arch/arm/boot/dts/zynq-zturn.dts
@@ -67,10 +67,17 @@
 &gem0 {
 	status = "okay";
 	phy-mode = "rgmii-id";
-	phy-handle = <&ethernet_phy>;
 
-	ethernet_phy: ethernet-phy@0 {
-		reg = <0x0>;
+	ethernet-phy@0 {
+		compatible = "ethernet-phy-ieee802.3-c22";
+		reg = <0>;
+		max-speed = <1000>;
+	};
+
+	ethernet-phy@3 {
+		compatible = "ethernet-phy-ieee802.3-c22";
+		reg = <3>;
+		max-speed = <1000>;
 	};
 };
 
-- 
2.16.4


^ permalink raw reply related	[flat|nested] 7+ messages in thread

* Re: [PATCH v2] ARM: dts: zynq: Fix ethernet PHY for v5 schematics
  2020-04-28 10:03   ` [PATCH v2] " Matwey V. Kornilov
@ 2020-05-01 16:10     ` Matwey V. Kornilov
  2020-05-11 13:35       ` Michal Simek
  0 siblings, 1 reply; 7+ messages in thread
From: Matwey V. Kornilov @ 2020-05-01 16:10 UTC (permalink / raw)
  To: Rob Herring, Michal Simek,
	open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
	moderated list:ARM/ZYNQ ARCHITECTURE, open list, Anton Gerasimov

Hi Anton,

I hope you are doing good. Could you please check this patch, since
you are initial author of zynq-zturn.dts and I suppose you do have the
"v4" board variant to test.

вт, 28 апр. 2020 г. в 13:04, Matwey V. Kornilov <matwey@sai.msu.ru>:
>
> There are at least two different versions existing for MYIR Zturn:
>
>  * v4 schematics has Atheros AR8035 PHY at 0b000
>      http://www.myirtech.com/download/Zynq7000/Z-TURNBOARD_schematic.pdf
>  * v5 schematics has Micrel KSZ9031 PHY at 0b011
>      v5 schematics available at DVD disk supplied with the board
>
> Specify both PHYs to make ethernet interface working for any board
> revision. This commit relies on of_mdiobus_register() behavior.
> When phy-handle is missed, every nested PHY node is considered,
> while ENODEVs are ignored.
>
> Before the patch:
>
> [   28.295002] macb e000b000.ethernet eth0: Could not attach PHY (-19)
>
> After the patch:
>
> [   28.257365] macb e000b000.ethernet eth0: PHY [e000b000.ethernet-ffffffff:00] driver [Micrel KSZ9031 Gigabit PHY] (irq=POLL)
> [   28.257384] macb e000b000.ethernet eth0: configuring for phy/rgmii-id link mode
>
> Signed-off-by: Matwey V. Kornilov <matwey@sai.msu.ru>

Cc: Anton Gerasimov <tossel@gmail.com>

> ---
> Changes since v1:
>  - reworded commit message
>
>  arch/arm/boot/dts/zynq-zturn.dts | 13 ++++++++++---
>  1 file changed, 10 insertions(+), 3 deletions(-)
>
> diff --git a/arch/arm/boot/dts/zynq-zturn.dts b/arch/arm/boot/dts/zynq-zturn.dts
> index 5ec616ebca08..07da9cf60d02 100644
> --- a/arch/arm/boot/dts/zynq-zturn.dts
> +++ b/arch/arm/boot/dts/zynq-zturn.dts
> @@ -67,10 +67,17 @@
>  &gem0 {
>         status = "okay";
>         phy-mode = "rgmii-id";
> -       phy-handle = <&ethernet_phy>;
>
> -       ethernet_phy: ethernet-phy@0 {
> -               reg = <0x0>;
> +       ethernet-phy@0 {
> +               compatible = "ethernet-phy-ieee802.3-c22";
> +               reg = <0>;
> +               max-speed = <1000>;
> +       };
> +
> +       ethernet-phy@3 {
> +               compatible = "ethernet-phy-ieee802.3-c22";
> +               reg = <3>;
> +               max-speed = <1000>;
>         };
>  };
>
> --
> 2.16.4
>


-- 
With best regards,
Matwey V. Kornilov

^ permalink raw reply	[flat|nested] 7+ messages in thread

* Re: [PATCH v2] ARM: dts: zynq: Fix ethernet PHY for v5 schematics
  2020-05-01 16:10     ` Matwey V. Kornilov
@ 2020-05-11 13:35       ` Michal Simek
       [not found]         ` <CAJs94EYK3DM7+_un_-d2ehUE1FsVL0j5sWjWKBTdcJU8EgJvkQ@mail.gmail.com>
  0 siblings, 1 reply; 7+ messages in thread
From: Michal Simek @ 2020-05-11 13:35 UTC (permalink / raw)
  To: Matwey V. Kornilov, Rob Herring, Michal Simek,
	open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
	moderated list:ARM/ZYNQ ARCHITECTURE, open list, Anton Gerasimov

Hi,

On 01. 05. 20 18:10, Matwey V. Kornilov wrote:
> Hi Anton,
> 
> I hope you are doing good. Could you please check this patch, since
> you are initial author of zynq-zturn.dts and I suppose you do have the
> "v4" board variant to test.
> 
> вт, 28 апр. 2020 г. в 13:04, Matwey V. Kornilov <matwey@sai.msu.ru>:
>>
>> There are at least two different versions existing for MYIR Zturn:
>>
>>  * v4 schematics has Atheros AR8035 PHY at 0b000
>>      http://www.myirtech.com/download/Zynq7000/Z-TURNBOARD_schematic.pdf
>>  * v5 schematics has Micrel KSZ9031 PHY at 0b011
>>      v5 schematics available at DVD disk supplied with the board
>>
>> Specify both PHYs to make ethernet interface working for any board
>> revision. This commit relies on of_mdiobus_register() behavior.
>> When phy-handle is missed, every nested PHY node is considered,
>> while ENODEVs are ignored.
>>
>> Before the patch:
>>
>> [   28.295002] macb e000b000.ethernet eth0: Could not attach PHY (-19)
>>
>> After the patch:
>>
>> [   28.257365] macb e000b000.ethernet eth0: PHY [e000b000.ethernet-ffffffff:00] driver [Micrel KSZ9031 Gigabit PHY] (irq=POLL)
>> [   28.257384] macb e000b000.ethernet eth0: configuring for phy/rgmii-id link mode
>>
>> Signed-off-by: Matwey V. Kornilov <matwey@sai.msu.ru>
> 
> Cc: Anton Gerasimov <tossel@gmail.com>
> 
>> ---
>> Changes since v1:
>>  - reworded commit message
>>
>>  arch/arm/boot/dts/zynq-zturn.dts | 13 ++++++++++---
>>  1 file changed, 10 insertions(+), 3 deletions(-)
>>
>> diff --git a/arch/arm/boot/dts/zynq-zturn.dts b/arch/arm/boot/dts/zynq-zturn.dts
>> index 5ec616ebca08..07da9cf60d02 100644
>> --- a/arch/arm/boot/dts/zynq-zturn.dts
>> +++ b/arch/arm/boot/dts/zynq-zturn.dts
>> @@ -67,10 +67,17 @@
>>  &gem0 {
>>         status = "okay";
>>         phy-mode = "rgmii-id";
>> -       phy-handle = <&ethernet_phy>;
>>
>> -       ethernet_phy: ethernet-phy@0 {
>> -               reg = <0x0>;
>> +       ethernet-phy@0 {
>> +               compatible = "ethernet-phy-ieee802.3-c22";
>> +               reg = <0>;
>> +               max-speed = <1000>;
>> +       };
>> +
>> +       ethernet-phy@3 {
>> +               compatible = "ethernet-phy-ieee802.3-c22";
>> +               reg = <3>;
>> +               max-speed = <1000>;
>>         };
>>  };
>>
>> --
>> 2.16.4
>>
> 
> 

Anton: Waiting for your testing.

Thanks,
Michal


^ permalink raw reply	[flat|nested] 7+ messages in thread

* Re: [PATCH v2] ARM: dts: zynq: Fix ethernet PHY for v5 schematics
       [not found]         ` <CAJs94EYK3DM7+_un_-d2ehUE1FsVL0j5sWjWKBTdcJU8EgJvkQ@mail.gmail.com>
@ 2020-07-20  6:31           ` Michal Simek
  0 siblings, 0 replies; 7+ messages in thread
From: Michal Simek @ 2020-07-20  6:31 UTC (permalink / raw)
  To: Matwey V. Kornilov, Michal Simek
  Cc: Rob Herring,
	open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
	moderated list:ARM/ZYNQ ARCHITECTURE, open list, Anton Gerasimov

Hi Matwey,

On 19. 07. 20 11:57, Matwey V. Kornilov wrote:
> 
> Ping?

Are you pinging me or Anton?
I really want another person to test this patch.
If there is none else who can test it I think it is time to remove
support for this board.

Thanks,
Michal

^ permalink raw reply	[flat|nested] 7+ messages in thread

end of thread, other threads:[~2020-07-20  6:31 UTC | newest]

Thread overview: 7+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2020-04-20 11:07 [PATCH] ARM: dts: zynq: Fix ethernet PHY for v5 schematics Matwey V. Kornilov
2020-04-20 11:19 ` Michal Simek
2020-04-20 11:22   ` Matwey V. Kornilov
2020-04-28 10:03   ` [PATCH v2] " Matwey V. Kornilov
2020-05-01 16:10     ` Matwey V. Kornilov
2020-05-11 13:35       ` Michal Simek
     [not found]         ` <CAJs94EYK3DM7+_un_-d2ehUE1FsVL0j5sWjWKBTdcJU8EgJvkQ@mail.gmail.com>
2020-07-20  6:31           ` Michal Simek

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