From: Ravi Bangoria <ravi.bangoria@linux.ibm.com>
To: Mark Rutland <mark.rutland@arm.com>
Cc: linuxppc-dev@lists.ozlabs.org, linux-kernel@vger.kernel.org,
eranian@google.com, peterz@infradead.org, mpe@ellerman.id.au,
paulus@samba.org, mingo@redhat.com, acme@kernel.org,
alexander.shishkin@linux.intel.com, jolsa@redhat.com,
namhyung@kernel.org, adrian.hunter@intel.com, ak@linux.intel.com,
kan.liang@linux.intel.com, alexey.budankov@linux.intel.com,
yao.jin@linux.intel.com, robert.richter@amd.com,
kim.phillips@amd.com, maddy@linux.ibm.com,
Madhavan Srinivasan <maddy@linux.vnet.ibm.com>,
Ravi Bangoria <ravi.bangoria@linux.ibm.com>
Subject: Re: [RFC 02/11] perf/core: Data structure to present hazard data
Date: Tue, 3 Mar 2020 20:01:30 +0530 [thread overview]
Message-ID: <767373d8-c291-9794-61b1-8917c300c730@linux.ibm.com> (raw)
In-Reply-To: <20200302145434.GE56497@lakrids.cambridge.arm.com>
On 3/2/20 8:24 PM, Mark Rutland wrote:
>> @@ -870,6 +871,13 @@ enum perf_event_type {
>> * { u64 phys_addr;} && PERF_SAMPLE_PHYS_ADDR
>> * { u64 size;
>> * char data[size]; } && PERF_SAMPLE_AUX
>> + * { u8 itype;
>> + * u8 icache;
>> + * u8 hazard_stage;
>> + * u8 hazard_reason;
>> + * u8 stall_stage;
>> + * u8 stall_reason;
>> + * u16 pad;} && PERF_SAMPLE_PIPELINE_HAZ
>> * };
>
> The existing comment shows the aux data *immediately* after ther
> phys_addr field, where you've placed struct perf_pipeline_haz_data.
>
> If adding to struct perf_sample_data is fine, this needs to come before
> the aux data in this comment. If adding to struct perf_sample_data is
> not fine. struct perf_pipeline_haz_data cannot live there.
>
> I suspect the latter is true, but you're getting away with it because
> you're not using both PERF_SAMPLE_AUX and PERF_SAMPLE_PIPELINE_HAZ
> simultaneously.
Right. Thanks for pointing it out. Will change it.
Ravi
next prev parent reply other threads:[~2020-03-03 14:32 UTC|newest]
Thread overview: 37+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-03-02 5:23 [RFC 00/11] perf: Enhancing perf to export processor hazard information Ravi Bangoria
2020-03-02 5:23 ` [RFC 01/11] powerpc/perf: Simplify ISA207_SIER macros Ravi Bangoria
2020-03-02 5:23 ` [RFC 02/11] perf/core: Data structure to present hazard data Ravi Bangoria
2020-03-02 9:55 ` Peter Zijlstra
2020-03-02 14:23 ` maddy
2020-03-02 14:48 ` Mark Rutland
2020-03-03 14:32 ` Ravi Bangoria
2020-03-02 14:54 ` Mark Rutland
2020-03-03 14:31 ` Ravi Bangoria [this message]
2020-03-02 5:23 ` [RFC 03/11] powerpc/perf: Arch specific definitions for pipeline Ravi Bangoria
2020-03-02 5:23 ` [RFC 04/11] powerpc/perf: Arch support to expose Hazard data Ravi Bangoria
2020-03-02 5:23 ` [RFC 05/11] perf tools: Enable record and script to record and show hazard data Ravi Bangoria
2020-03-02 5:23 ` [RFC 06/11] perf hists: Make a room for hazard info in struct hist_entry Ravi Bangoria
2020-03-02 5:23 ` [RFC 07/11] perf hazard: Functions to convert generic hazard data to arch specific string Ravi Bangoria
2020-03-02 5:23 ` [RFC 08/11] perf report: Enable hazard mode Ravi Bangoria
2020-03-02 5:23 ` [RFC 09/11] perf annotate: Introduce type for annotation_line Ravi Bangoria
2020-03-02 5:23 ` [RFC 10/11] perf annotate: Preparation for hazard Ravi Bangoria
2020-03-02 5:23 ` [RFC 11/11] perf annotate: Show hazard data in tui mode Ravi Bangoria
2020-03-02 10:13 ` [RFC 00/11] perf: Enhancing perf to export processor hazard information Peter Zijlstra
2020-03-02 20:21 ` Stephane Eranian
2020-03-02 22:25 ` Kim Phillips
2020-03-05 4:46 ` Ravi Bangoria
2020-03-05 22:06 ` Kim Phillips
2020-03-11 16:00 ` Ravi Bangoria
2020-03-12 22:38 ` Kim Phillips
2020-03-17 6:50 ` maddy
2020-03-18 17:35 ` Kim Phillips
2020-03-19 11:22 ` Michael Ellerman
2020-03-26 10:19 ` maddy
2020-03-26 19:48 ` Kim Phillips
2020-04-20 7:09 ` Madhavan Srinivasan
2020-04-27 7:18 ` Madhavan Srinivasan
2020-03-05 4:28 ` maddy
2020-03-03 1:33 ` Andi Kleen
2020-03-05 5:06 ` Ravi Bangoria
2020-03-02 21:08 ` Paul Clarke
2020-03-05 5:06 ` Ravi Bangoria
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