From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S970157AbdAECYd (ORCPT ); Wed, 4 Jan 2017 21:24:33 -0500 Received: from mailout4.samsung.com ([203.254.224.34]:52598 "EHLO mailout4.samsung.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S970139AbdAECY1 (ORCPT ); Wed, 4 Jan 2017 21:24:27 -0500 X-AuditID: b6c32a3c-f79646d000004d82-3d-586dae59031b Subject: Re: [PATCH V2 5/5] ARM: dts: exynos5440: support the phy-pcie node for pcie To: Krzysztof Kozlowski Cc: linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-samsung-soc@vger.kernel.org, bhelgaas@google.com, robh+dt@kernel.org, mark.rutland@arm.com, kgene@kernel.org, kishon@ti.com, jingoohan1@gmail.com, vivek.gautam@codeaurora.org, pankaj.dubey@samsung.com, alim.akhtar@samsung.com, cpgs@samsung.com From: Jaehoon Chung Message-id: <76739931-33f0-a457-fae1-7ea11ea0cfea@samsung.com> Date: Thu, 05 Jan 2017 11:24:24 +0900 User-Agent: Mozilla/5.0 (X11; Linux i686; rv:45.0) Gecko/20100101 Thunderbird/45.3.0 MIME-version: 1.0 In-reply-to: <20170104175822.5zedyszx2phiehuv@kozik-lap> Content-type: text/plain; charset=utf-8 Content-transfer-encoding: 7bit X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFtrNJsWRmVeSWpSXmKPExsWy7bCmrm7kutwIg+a7rBYP5m1js1jSlGHx 8pCmxfwj51gtVnyZyW7R//g1s8WFpz1sFufPb2C3uLxrDpvF2XnH2SxmnN/HZLH0+kUmi0Vb v7BbtO49wm5x4ucOZgd+jzXz1jB6XO7rZfLYOesuu8eCTaUem1Z1snn0bVnF6HH8xnYmj8+b 5AI4olJtMlITU1KLFFLzkvNTMvPSbZW8g+Od403NDAx1DS0tzJUU8hJzU22VXHwCdN0yc4BO V1IoS8wpBQoFJBYXK+nb2RTll5akKmTkF5fYKkUbGhrpGRqY6xkZGemZGMdaGZkClSSkZhxv 7GIsWCdXMXFOegPjfvEuRk4OCQETiX9TTrJD2GISF+6tZ+ti5OIQEtjBKPHr5j8mCKedSeLH 1wcsMB03Gt5AJeYwSmxt/QHVco9R4u2BU2BVwgJhEjc/HQezRQQ0Ja7//c4KYjML3GGS2LZc CMRmE9CR2P7tOBOIzStgJzF1whI2EJtFQFVi8cljYLYo0JzN91+yQ9QISvyYfA9sJqeAhcT2 nnNsEDM1JV58mcQCYctLbF7zlhnkIAmBj+wSl+/+B2rmAHJkJTYdYIYwXSSWn/WBeEZY4tXx LVDvS0us+neLCaK1m1Hi35eNbBBOD6PEra2rmSCqjCXuP7jHDLGMT+Ld1x5WiKG8Eh1tQhAl HhJr1l9lgwg7SkzoM4KEz3tgkH7bxjqBUX4WkndmIXlhFpIXFjAyr2IUSy0ozk1PLTYssNAr TswtLs1L10vOz93ECE64WjY7GC+d8znEKMDBqMTD2/AtJ0KINbGsuDL3EKMEB7OSCC/PqtwI Id6UxMqq1KL8+KLSnNTiQ4ymwCCeyCwlmpwPzAZ5JfGGJmaGJkYmhobmRgZGSuK8yxqtI4QE 0hNLUrNTUwtSi2D6mDg4pRoY2dUnuxyzzRK7U73r5CSZ/1ZnOu+fLl/CrqeQmLa1Sq5Y4+8H 6YeceyrZJj8tbqo4+HbK3agE5b/39n35sdfnXLlmTcuRjUyqeZ0X27Ka+9QCTCon7w+r7Z5u vKn9wLK2b+sebtgUOn3NLdbH4bd6eq3XRD+56vC3K4nLuum8ab7L7QSbfrXpSizFGYmGWsxF xYkAmn+9Jc4DAAA= X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFnrGIsWRmVeSWpSXmKPExsVy+t9jQd2IdbkRBjPX6ls8mLeNzWJJU4bF y0OaFvOPnGO1WPFlJrtF/+PXzBYXnvawWZw/v4Hd4vKuOWwWZ+cdZ7OYcX4fk8XS6xeZLBZt /cJu0br3CLvFiZ87mB34PdbMW8Pocbmvl8lj56y77B4LNpV6bFrVyebRt2UVo8fxG9uZPD5v kgvgiHKzyUhNTEktUkjNS85PycxLt1UKDXHTtVBSyEvMTbVVitD1DQlSUihLzCkF8owM0ICD c4B7sJK+XYJbxvHGLsaCdXIVE+ekNzDuF+9i5OSQEDCRuNHwhgnCFpO4cG89G4gtJDCLUaLx G1CcC8h+wCjx+OpERpCEsECYxPnZS1hBbBEBTYnrf7+zQhS9Z5R4/bWNHcRhFrjDJLGu/zI7 SBWbgI7E9m/HwVbwCthJTJ2wBGwFi4CqxOKTx4BsDg5RoKnPG50gSgQlfky+xwJicwpYSGzv OQdWwiygLjFlSi5ImFlAXmLzmrfMExiBrkTomIVQNQtJ1QJG5lWMEqkFyQXFSem5hnmp5XrF ibnFpXnpesn5uZsYwXH8TGoH48Fd7ocYBTgYlXh4PQRyI4RYE8uKK3MPMUpwMCuJ8PKsAgrx piRWVqUW5ccXleakFh9iNAX6YiKzlGhyPjDF5JXEG5qYm5gbG1iYW1qaGCmJ8zbOfhYuJJCe WJKanZpakFoE08fEwSnVwOj9cK7/pjd3FD1Z7kZJO6pXagenLVtpvWd1RcElZ0/zy/7XTDZN OfDnzoFibamapz80jjfZvWSxZVzzV+6OWs51EZ6fAmvzhA+oikhZLU6vXn0hrerw99PxRxI2 Wh1aHc9ULputym3W8qvIftev7n+h2W/cvWI533wwMkx/In7cYQpP4OYNzkosxRmJhlrMRcWJ ADxNp+/5AgAA X-MTR: 20000000000000000@CPGS X-CMS-MailID: 20170105022424epcas1p1dac091b72dd713ac106fc412c8660400 X-Msg-Generator: CA X-Sender-IP: 203.254.230.26 X-Local-Sender: =?UTF-8?B?7KCV7J6s7ZuIG1RpemVuIFBsYXRmb3JtIExhYihTL1fshLw=?= =?UTF-8?B?7YSwKRvsgrzshLHsoITsnpAbUzUo7LGF7J6EKS/ssYXsnoQ=?= X-Global-Sender: =?UTF-8?B?SmFlaG9vbiBDaHVuZxtUaXplbiBQbGF0Zm9ybSBMYWIuG1Nh?= =?UTF-8?B?bXN1bmcgRWxlY3Ryb25pY3MbUzUvU2VuaW9yIEVuZ2luZWVy?= X-Sender-Code: =?UTF-8?B?QzEwG1NUQUYbQzEwVjgxMTE=?= CMS-TYPE: 101P DLP-Filter: Pass X-CFilter-Loop: Reflected X-HopCount: 7 X-CMS-RootMailID: 20170104123436epcas1p10b52f24e7d6c00edb44e4331a1870e4d X-RootMTR: 20170104123436epcas1p10b52f24e7d6c00edb44e4331a1870e4d References: <20170104123435.30740-1-jh80.chung@samsung.com> <20170104123435.30740-6-jh80.chung@samsung.com> <20170104175822.5zedyszx2phiehuv@kozik-lap> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 01/05/2017 02:58 AM, Krzysztof Kozlowski wrote: > On Wed, Jan 04, 2017 at 09:34:35PM +0900, Jaehoon Chung wrote: >> Add phy-pcie node for using Exynos5440 pcie. >> And use the reg-names as "elbi" and "config". > > 'and' is only for joining in compound sentences, don't start with it. Got it. > >> Because the getting configuratioin space address from ranges is old way. > > Spell-check please. Will do. > >> It also is helpful to distinguish more clearly. > > Distinguish what? Please work on the commit msg, I am not picking Will update the commit-msg. >> >> Signed-off-by: Jaehoon Chung >> --- >> Changelog on V2: >> - Removes the child-node >> - Fixes the typo >> - Removes the unnecessary comments >> >> arch/arm/boot/dts/exynos5440.dtsi | 34 ++++++++++++++++++++++------------ >> 1 file changed, 22 insertions(+), 12 deletions(-) >> >> diff --git a/arch/arm/boot/dts/exynos5440.dtsi b/arch/arm/boot/dts/exynos5440.dtsi >> index 2a2e570..feb074d 100644 >> --- a/arch/arm/boot/dts/exynos5440.dtsi >> +++ b/arch/arm/boot/dts/exynos5440.dtsi >> @@ -290,11 +290,22 @@ >> clock-names = "usbhost"; >> }; >> >> + pcie_phy0: pcie-phy@270000 { >> + #phy-cells = <0>; >> + compatible = "samsung,exynos5440-pcie-phy"; >> + reg = <0x270000 0x1000>, <0x271000 0x40>; >> + }; >> + >> + pcie_phy1: pcie-phy@272000 { >> + #phy-cells = <0>; >> + compatible = "samsung,exynos5440-pcie-phy"; >> + reg = <0x272000 0x1000>, <0x271040 0x40>; >> + }; >> + >> pcie_0: pcie@290000 { >> compatible = "samsung,exynos5440-pcie", "snps,dw-pcie"; >> - reg = <0x290000 0x1000 >> - 0x270000 0x1000 >> - 0x271000 0x40>; >> + reg = <0x290000 0x1000>, <0x40000000 0x1000>; >> + reg-names = "elbi", "config"; >> interrupts = , >> , >> ; >> @@ -303,9 +314,9 @@ >> #address-cells = <3>; >> #size-cells = <2>; >> device_type = "pci"; >> - ranges = <0x00000800 0 0x40000000 0x40000000 0 0x00001000 /* configuration space */ >> - 0x81000000 0 0 0x40001000 0 0x00010000 /* downstream I/O */ >> - 0x82000000 0 0x40011000 0x40011000 0 0x1ffef000>; /* non-prefetchable memory */ >> + phys = <&pcie_phy0>; >> + ranges = <0x81000000 0 0 0x40001000 0 0x00010000 >> + 0x82000000 0 0x40011000 0x40011000 0 0x1ffef000>; > > I think the comments were useful. You can leave them. Ok. will keep. > >> #interrupt-cells = <1>; >> interrupt-map-mask = <0 0 0 0>; >> interrupt-map = <0x0 0 &gic 53>; >> @@ -315,9 +326,8 @@ >> >> pcie_1: pcie@2a0000 { >> compatible = "samsung,exynos5440-pcie", "snps,dw-pcie"; >> - reg = <0x2a0000 0x1000 >> - 0x272000 0x1000 >> - 0x271040 0x40>; >> + reg = <0x2a0000 0x1000>, <0x60000000 0x1000>; >> + reg-names = "elbi", "config"; >> interrupts = , >> , >> ; >> @@ -326,9 +336,9 @@ >> #address-cells = <3>; >> #size-cells = <2>; >> device_type = "pci"; >> - ranges = <0x00000800 0 0x60000000 0x60000000 0 0x00001000 /* configuration space */ >> - 0x81000000 0 0 0x60001000 0 0x00010000 /* downstream I/O */ >> - 0x82000000 0 0x60011000 0x60011000 0 0x1ffef000>; /* non-prefetchable memory */ >> + phys = <&pcie_phy1>; >> + ranges = <0x81000000 0 0 0x60001000 0 0x00010000 >> + 0x82000000 0 0x60011000 0x60011000 0 0x1ffef000>; > > I think the comments were useful. You can leave them. > > This looks like depending on the changes in the driver, so I will need a > tag or stable branch from PCIe maintainers. Right.. Best Regards, Jaehoon Chung > > Best regards, > Krzysztof > > >