From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-10.3 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI,NICE_REPLY_A, SPF_HELO_NONE,SPF_PASS,USER_AGENT_SANE_1 autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 31A50C433DB for ; Tue, 12 Jan 2021 12:21:59 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 03BCC20799 for ; Tue, 12 Jan 2021 12:21:58 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1733231AbhALMVp (ORCPT ); Tue, 12 Jan 2021 07:21:45 -0500 Received: from foss.arm.com ([217.140.110.172]:45128 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727687AbhALMVo (ORCPT ); Tue, 12 Jan 2021 07:21:44 -0500 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id A082E1042; Tue, 12 Jan 2021 04:20:58 -0800 (PST) Received: from [10.57.39.145] (unknown [10.57.39.145]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 180C23F66E; Tue, 12 Jan 2021 04:20:54 -0800 (PST) Subject: Re: [PATCH v3 09/21] arm64: cpufeature: Add global feature override facility To: Marc Zyngier Cc: Catalin Marinas , linux-arm-kernel@lists.infradead.org, kvmarm@lists.cs.columbia.edu, linux-kernel@vger.kernel.org, Will Deacon , Mark Rutland , David Brazdil , Alexandru Elisei , Ard Biesheuvel , Jing Zhang , Ajay Patil , Prasad Sodagudi , Srinivas Ramana , James Morse , Julien Thierry , kernel-team@android.com References: <20210111132811.2455113-1-maz@kernel.org> <20210111132811.2455113-10-maz@kernel.org> <20210111184154.GC17941@gaia> <129db8bd3913a90c96d4cfe4f55e27a0@kernel.org> From: Suzuki K Poulose Message-ID: <7720a317-2591-3b60-41ce-772bf168bee7@arm.com> Date: Tue, 12 Jan 2021 12:20:45 +0000 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.6.0 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-GB Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 1/12/21 11:51 AM, Marc Zyngier wrote: > On 2021-01-12 11:50, Marc Zyngier wrote: >> Hi Suzuki, >> >> On 2021-01-12 09:17, Suzuki K Poulose wrote: >>> Hi Marc, >>> >>> On 1/11/21 7:48 PM, Marc Zyngier wrote: >> >> [...] >> >>>> diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c >>>> index 894af60b9669..00d99e593b65 100644 >>>> --- a/arch/arm64/kernel/cpufeature.c >>>> +++ b/arch/arm64/kernel/cpufeature.c >>>> @@ -774,6 +774,7 @@ static void __init init_cpu_ftr_reg(u32 sys_reg, u64 new) >>>>       u64 strict_mask = ~0x0ULL; >>>>       u64 user_mask = 0; >>>>       u64 valid_mask = 0; >>>> +    u64 override_val = 0, override_mask = 0; >>>> >>>>       const struct arm64_ftr_bits *ftrp; >>>>       struct arm64_ftr_reg *reg = get_arm64_ftr_reg(sys_reg); >>>> @@ -781,9 +782,35 @@ static void __init init_cpu_ftr_reg(u32 sys_reg, u64 new) >>>>       if (!reg) >>>>           return; >>>> >>>> +    if (reg->override_mask && reg->override_val) { >>>> +        override_mask = *reg->override_mask; >>>> +        override_val = *reg->override_val; >>>> +    } >>>> + >>>>       for (ftrp = reg->ftr_bits; ftrp->width; ftrp++) { >>>>           u64 ftr_mask = arm64_ftr_mask(ftrp); >>>>           s64 ftr_new = arm64_ftr_value(ftrp, new); >>>> +        s64 ftr_ovr = arm64_ftr_value(ftrp, override_val); >>>> + >>>> +        if ((ftr_mask & override_mask) == ftr_mask) { >>>> +            if (ftr_ovr < ftr_new) { >>> >>> Here we assume that all the features are FTR_LOWER_SAFE. We could >>> probably use arm64_ftr_safe_value(ftrp, ftr_new, ftr_ovr) here ? >>> That would cover us for both HIGHER_SAFE and LOWER_SAFE features. >>> However that may be restrictive for FTR_EXACT, as we the safe >>> value would be set to "ftr->safe_val". I guess that may be better >>> than forcing to use an unsafe value for the boot CPU, which could >>> anyway conflict with the other CPUs and eventually trigger the >>> ftr alue to be safe_val. >> >> I like the idea of using the helper, as it cleanups up the code a bit. >> However, not being to set a feature to a certain value could be restrictive, >> as in general, it means that we can only disable a feature and not adjust >> its level of support. >> >> Take PMUVER for example: with the helper, I can't override it from v8.4 to >> v8.1. I can only go to v8.0. > > Actually, we can only *disable* the PMU altogether. Same question though... It depends on two things : 1) What is the safe value for an EXACT typed feature ? Usually, that means either disabled, or the lowest possible value. 2) How is this value consumed ? a) i.e, Do we use the per-CPU value Then none of these changes have any effect b) System wide value ? Then we get the safe value as "influenced" by the infrastructure. The safe value we use for EXACT features is exclusively for making sure that the system uses the safe assumption and thus should be the best option. To answer your question, for PMU, it is 0, implies, v8.0. Or we could update the safe value to -1 (0xf) as the safe value, which is a bit more safer, kind of implying that the PMU is not a standard one. Cheers Suzuki > >         M. > >> >> Is it something we care about? >> >> Thanks, >> >>         M. >