From: Rex-BC Chen <rex-bc.chen@mediatek.com>
To: AngeloGioacchino Del Regno
<angelogioacchino.delregno@collabora.com>, <rafael@kernel.org>,
<viresh.kumar@linaro.org>, <robh+dt@kernel.org>,
<krzk+dt@kernel.org>
Cc: <matthias.bgg@gmail.com>, <jia-wei.chang@mediatek.com>,
<roger.lu@mediatek.com>, <hsinyi@google.com>,
<linux-pm@vger.kernel.org>, <devicetree@vger.kernel.org>,
<linux-kernel@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
<linux-mediatek@lists.infradead.org>,
<Project_Global_Chrome_Upstream_Group@mediatek.com>
Subject: Re: [PATCH V2 13/15] cpufreq: mediatek: Link CCI device to CPU
Date: Mon, 11 Apr 2022 19:50:03 +0800 [thread overview]
Message-ID: <7920cc153930ab1e724fe65df370fc70f6cbe3db.camel@mediatek.com> (raw)
In-Reply-To: <dc18d877-effb-1286-341d-1792ea6fcc05@collabora.com>
On Fri, 2022-04-08 at 15:37 +0200, AngeloGioacchino Del Regno wrote:
> Il 08/04/22 06:59, Rex-BC Chen ha scritto:
> > From: Jia-Wei Chang <jia-wei.chang@mediatek.com>
> >
> > In some MediaTek SoCs, like MT8183, CPU and CCI share the same
> > power
> > supplies. Cpufreq needs to check if CCI devfreq exists and wait
> > until
> > CCI devfreq ready before scaling frequency.
> >
> > - Add is_ccifreq_ready() to link CCI device to CPI, and CPU will
> > start
> > DVFS when CCI is ready.
> > - Add platform data for MT8183.
> >
> > Signed-off-by: Jia-Wei Chang <jia-wei.chang@mediatek.com>
> > ---
> > drivers/cpufreq/mediatek-cpufreq.c | 69
> > +++++++++++++++++++++++++++++-
> > 1 file changed, 68 insertions(+), 1 deletion(-)
> >
> > diff --git a/drivers/cpufreq/mediatek-cpufreq.c
> > b/drivers/cpufreq/mediatek-cpufreq.c
> > index b08ab7c14818..cebe5af2ef5d 100644
> > --- a/drivers/cpufreq/mediatek-cpufreq.c
> > +++ b/drivers/cpufreq/mediatek-cpufreq.c
> > @@ -22,6 +22,7 @@ struct mtk_cpufreq_platform_data {
> > int proc_max_volt;
> > int sram_min_volt;
> > int sram_max_volt;
> > + bool is_ccifreq_support;
>
> bool ccifreq_supported; looks better.
Hello Angelo,
Thanks for your review.
OK, I will modify this in next version.
>
> > };
> >
> > /*
> > @@ -38,6 +39,7 @@ struct mtk_cpufreq_platform_data {
> > struct mtk_cpu_dvfs_info {
> > struct cpumask cpus;
> > struct device *cpu_dev;
> > + struct device *cci_dev;
> > struct regulator *proc_reg;
> > struct regulator *sram_reg;
> > struct clk *cpu_clk;
> > @@ -52,6 +54,7 @@ struct mtk_cpu_dvfs_info {
> > int opp_cpu;
> > unsigned long opp_freq;
> > const struct mtk_cpufreq_platform_data *soc_data;
> > + bool is_ccifreq_bounded;
>
> bool ccifreq_bound; looks better.
>
OK, I will modify this in next version.
> > };
> >
> > static struct platform_device *cpufreq_pdev;
> > @@ -171,6 +174,29 @@ static int mtk_cpufreq_set_voltage(struct
> > mtk_cpu_dvfs_info *info, int vproc)
> > return ret;
> > }
> >
> > +static bool is_ccifreq_ready(struct mtk_cpu_dvfs_info *info)
> > +{
> > + struct device_link *sup_link;
> > +
> > + if (info->is_ccifreq_bounded)
> > + return true;
> > +
> > + sup_link = device_link_add(info->cpu_dev, info->cci_dev,
> > + DL_FLAG_AUTOREMOVE_CONSUMER);
> > + if (!sup_link) {
> > + dev_err(info->cpu_dev, "cpu%d: sup_link is NULL\n",
> > + info->opp_cpu);
>
> Please, don't break this line: 84 columns are ok.
>
OK, I will modify this in next version.
> > + return false;
> > + }
> > +
> > + if (sup_link->supplier->links.status != DL_DEV_DRIVER_BOUND)
> > + return false;
> > +
> > + info->is_ccifreq_bounded = true;
> > +
> > + return true;
> > +}
> > +
> > static int mtk_cpufreq_set_target(struct cpufreq_policy *policy,
> > unsigned int index)
> > {
> > @@ -183,6 +209,9 @@ static int mtk_cpufreq_set_target(struct
> > cpufreq_policy *policy,
> > long freq_hz, old_freq_hz;
> > int vproc, old_vproc, inter_vproc, target_vproc, ret;
> >
> > + if (info->soc_data->is_ccifreq_support &&
> > !is_ccifreq_ready(info))
> > + return 0;
>
> Honestly, I think that pretending that everything is alright and
> faking
> set_target success is *not* a good idea...
>
> You should return -EAGAIN here, not zero.
>
> Regards,
> Angelo
>
As metioneded by Kevin, I will review these three situations.
Thanks for your suggestion.
BRs,
Rex
next prev parent reply other threads:[~2022-04-11 11:50 UTC|newest]
Thread overview: 69+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-04-08 4:58 [PATCH V2 00/15] cpufreq: mediatek: Cleanup and support MT8183 and MT8186 Rex-BC Chen
2022-04-08 4:58 ` [PATCH V2 01/15] dt-bindings: cpufreq: mediatek: Add MediaTek CCI property Rex-BC Chen
2022-04-08 8:10 ` Krzysztof Kozlowski
2022-04-08 10:24 ` Rex-BC Chen
2022-04-08 11:49 ` Krzysztof Kozlowski
2022-04-11 6:48 ` Rex-BC Chen
2022-04-08 4:58 ` [PATCH V2 02/15] cpufreq: mediatek: Use module_init and add module_exit Rex-BC Chen
2022-04-08 13:36 ` AngeloGioacchino Del Regno
2022-04-11 3:17 ` Viresh Kumar
2022-04-08 4:58 ` [PATCH V2 03/15] cpufreq: mediatek: Cleanup variables and error handling in mtk_cpu_dvfs_info_init() Rex-BC Chen
2022-04-08 13:36 ` AngeloGioacchino Del Regno
2022-04-11 3:20 ` Viresh Kumar
2022-04-08 4:58 ` [PATCH V2 04/15] cpufreq: mediatek: Remove unused headers Rex-BC Chen
2022-04-08 13:36 ` AngeloGioacchino Del Regno
2022-04-11 3:21 ` Viresh Kumar
2022-04-08 4:58 ` [PATCH V2 05/15] cpufreq: mediatek: Enable clocks and regulators Rex-BC Chen
2022-04-08 13:36 ` AngeloGioacchino Del Regno
2022-04-11 3:22 ` Viresh Kumar
2022-04-08 4:58 ` [PATCH V2 06/15] cpufreq: mediatek: Record previous target vproc value Rex-BC Chen
2022-04-08 13:36 ` AngeloGioacchino Del Regno
2022-04-11 11:35 ` Rex-BC Chen
2022-04-11 3:26 ` Viresh Kumar
2022-04-11 11:33 ` Rex-BC Chen
2022-04-08 4:59 ` [PATCH V2 08/15] cpufreq: mediatek: Move voltage limits to platform data Rex-BC Chen
2022-04-08 13:36 ` AngeloGioacchino Del Regno
2022-04-11 11:18 ` Rex-BC Chen
2022-04-08 4:59 ` [PATCH V2 09/15] cpufreq: mediatek: Add .get function Rex-BC Chen
2022-04-08 4:59 ` [PATCH V2 10/15] cpufreq: mediatek: Make sram regulator optional Rex-BC Chen
2022-04-08 13:37 ` AngeloGioacchino Del Regno
2022-04-08 20:32 ` Kevin Hilman
2022-04-14 10:53 ` Rex-BC Chen
2022-04-14 17:20 ` Kevin Hilman
2022-04-08 4:59 ` [PATCH V2 11/15] cpufreq: mediatek: Update logic of voltage_tracking() Rex-BC Chen
2022-04-08 21:08 ` Kevin Hilman
2022-04-14 11:30 ` Rex-BC Chen
2022-04-08 4:59 ` [PATCH V2 12/15] cpufreq: mediatek: Use maximum voltage in init stage Rex-BC Chen
2022-04-08 13:37 ` AngeloGioacchino Del Regno
2022-04-12 11:24 ` Rex-BC Chen
2022-04-14 3:40 ` Rex-BC Chen
2022-04-08 4:59 ` [PATCH V2 13/15] cpufreq: mediatek: Link CCI device to CPU Rex-BC Chen
2022-04-08 13:37 ` AngeloGioacchino Del Regno
2022-04-11 11:50 ` Rex-BC Chen [this message]
2022-04-08 20:54 ` Kevin Hilman
2022-04-11 11:51 ` Rex-BC Chen
2022-04-11 12:31 ` Rex-BC Chen
2022-04-11 18:13 ` Kevin Hilman
2022-04-12 12:26 ` Rex-BC Chen
2022-04-12 18:50 ` Kevin Hilman
2022-04-13 11:32 ` Rex-BC Chen
2022-04-13 21:41 ` Kevin Hilman
2022-04-14 2:32 ` Rex-BC Chen
2022-04-14 21:48 ` Kevin Hilman
2022-04-15 2:31 ` Rex-BC Chen
2022-04-19 18:16 ` Kevin Hilman
2022-04-08 4:59 ` [PATCH V2 14/15] cpufreq: mediatek: Add support for MT8186 Rex-BC Chen
2022-04-08 13:37 ` AngeloGioacchino Del Regno
2022-04-08 21:10 ` Kevin Hilman
2022-04-11 11:14 ` Rex-BC Chen
2022-04-08 4:59 ` [PATCH V2 15/15] cpufreq: mediatek: Use device print to show logs Rex-BC Chen
2022-04-08 13:37 ` AngeloGioacchino Del Regno
2022-04-11 3:29 ` Viresh Kumar
2022-04-11 11:09 ` Rex-BC Chen
[not found] ` <20220408045908.21671-8-rex-bc.chen@mediatek.com>
2022-04-08 13:36 ` [PATCH V2 07/15] cpufreq: mediatek: Add opp notification for SVS support AngeloGioacchino Del Regno
2022-04-08 20:29 ` Kevin Hilman
[not found] ` <3b7bf25a3da6c8f780c87784c1f796bf1e464238.camel@mediatek.com>
2022-04-11 18:09 ` Kevin Hilman
[not found] ` <dfe2d3e3401a6f2a7be9db4e8a0590d3dd9a6969.camel@mediatek.com>
2022-04-12 18:04 ` Kevin Hilman
2022-04-08 21:11 ` [PATCH V2 00/15] cpufreq: mediatek: Cleanup and support MT8183 and MT8186 Kevin Hilman
2022-04-09 1:05 ` Hsin-Yi Wang
2022-04-11 11:37 ` Rex-BC Chen
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