From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id B688EC433EF for ; Wed, 20 Apr 2022 14:37:59 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1379715AbiDTOkn (ORCPT ); Wed, 20 Apr 2022 10:40:43 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41824 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1357135AbiDTOkl (ORCPT ); Wed, 20 Apr 2022 10:40:41 -0400 Received: from alexa-out-sd-02.qualcomm.com (alexa-out-sd-02.qualcomm.com [199.106.114.39]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 208B610FD9; Wed, 20 Apr 2022 07:37:55 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; i=@quicinc.com; q=dns/txt; s=qcdkim; t=1650465475; x=1682001475; h=message-id:date:mime-version:subject:to:cc:references: from:in-reply-to:content-transfer-encoding; bh=/65Q/A5qV4iH0TpXNaEEaR3xz1DwV3pVArJz55Dk5PU=; b=cshiz6P9C7FpxJzkly9jP7WaG5Kwf+RKbJKxZVi2eajHmhvJvv6IdXcP yFchMajK2OTGylxr07eUY2oG0jQrMBbivwVUIQmbMwI0t8VD8E1xDT51p Q5AFdCRWL+BL1SJeG48yIbaOMarB7HiX8jYxIf9gtYMgbPN/gv4FJuauN s=; Received: from unknown (HELO ironmsg03-sd.qualcomm.com) ([10.53.140.143]) by alexa-out-sd-02.qualcomm.com with ESMTP; 20 Apr 2022 07:37:54 -0700 X-QCInternal: smtphost Received: from nasanex01c.na.qualcomm.com ([10.47.97.222]) by ironmsg03-sd.qualcomm.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 Apr 2022 07:37:54 -0700 Received: from nalasex01a.na.qualcomm.com (10.47.209.196) by nasanex01c.na.qualcomm.com (10.47.97.222) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.22; Wed, 20 Apr 2022 07:37:54 -0700 Received: from [10.239.133.9] (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.22; Wed, 20 Apr 2022 07:37:50 -0700 Message-ID: <7926128f-c547-495e-5ae2-d069f31cc3a1@quicinc.com> Date: Wed, 20 Apr 2022 22:37:48 +0800 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:91.0) Gecko/20100101 Thunderbird/91.5.1 Subject: Re: [PATCH v5 08/10] dt-bindings: arm: Adds CoreSight TPDA hardware definitions Content-Language: en-US To: Mike Leach CC: Mathieu Poirier , Suzuki K Poulose , Alexander Shishkin , Leo Yan , "Greg Kroah-Hartman" , , , , Tingwei Zhang , Yuanfang Zhang , Tao Zhang , Trilok Soni , Hao Zhang , References: <20220412125035.40312-1-quic_jinlmao@quicinc.com> <20220412125035.40312-9-quic_jinlmao@quicinc.com> From: Jinlong Mao In-Reply-To: Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 7bit X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01a.na.qualcomm.com (10.47.209.196) Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 4/19/2022 4:32 PM, Mike Leach wrote: > Hi > > On Tue, 12 Apr 2022 at 13:51, Mao Jinlong wrote: >> Adds new coresight-tpda.yaml file describing the bindings required >> to define tpda in the device trees. >> >> Signed-off-by: Tao Zhang >> Signed-off-by: Mao Jinlong >> --- >> .../bindings/arm/coresight-tpda.yaml | 119 ++++++++++++++++++ >> 1 file changed, 119 insertions(+) >> create mode 100644 Documentation/devicetree/bindings/arm/coresight-tpda.yaml >> >> diff --git a/Documentation/devicetree/bindings/arm/coresight-tpda.yaml b/Documentation/devicetree/bindings/arm/coresight-tpda.yaml >> new file mode 100644 >> index 000000000000..2c79de0a7928 >> --- /dev/null >> +++ b/Documentation/devicetree/bindings/arm/coresight-tpda.yaml >> @@ -0,0 +1,119 @@ >> +# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause >> +# Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved. >> +%YAML 1.2 >> +--- >> +$id: http://devicetree.org/schemas/arm/coresight-tpda.yaml# >> +$schema: http://devicetree.org/meta-schemas/core.yaml# >> + >> +title: Trace, Profiling and Diagnostics Aggregator - TPDA >> + >> +description: | >> + TPDAs are responsible for packetization and timestamping of data sets >> + utilizing the MIPI STPv2 packet protocol. Pulling data sets from one or >> + more attached TPDM and pushing the resultant (packetized) data out a >> + master ATB interface. Performing an arbitrated ATB interleaving (funneling) >> + task for free-flowing data from TPDM (i.e. CMB and DSB data set flows). >> + >> +maintainers: >> + - Suzuki K Poulose >> + - Mathieu Poirier >> + > as mentioned in patch 03 - these should be bindings maintainers. > > with the above change > > Reviewed by: Mike Leach > > Thank you Mike. I will address the comments in next version. > >> +properties: >> + $nodename: >> + pattern: "^tpda(@[0-9a-f]+)$" >> + compatible: >> + items: >> + - const: qcom,coresight-tpda >> + - const: arm,primecell >> + >> + reg: >> + maxItems: 1 >> + >> + clocks: >> + maxItems: 1 >> + >> + clock-names: >> + items: >> + - const: apb_pclk >> + >> + in-ports: >> + type: object >> + description: | >> + Input connections from TPDM to TPDA >> + $ref: /schemas/graph.yaml#/properties/ports >> + >> + properties: >> + '#address-cells': >> + const: 1 >> + >> + '#size-cells': >> + const: 0 >> + >> + patternProperties: >> + "^port@[0-9a-f]+$": >> + type: object >> + required: >> + - reg >> + >> + required: >> + - '#size-cells' >> + - '#address-cells' >> + >> + out-ports: >> + type: object >> + description: | >> + Output connections from the TPDA to legacy CoreSight trace bus. >> + $ref: /schemas/graph.yaml#/properties/ports >> + >> + properties: >> + port: >> + description: >> + Output connection from the TPDA to legacy CoreSight Trace bus. >> + $ref: /schemas/graph.yaml#/properties/port >> + >> +required: >> + - compatible >> + - reg >> + - clocks >> + - clock-names >> + - in-ports >> + - out-ports >> + >> +additionalProperties: false >> + >> +examples: >> + # minimum tpda definition. >> + - | >> + tpda@6004000 { >> + compatible = "qcom,coresight-tpda", "arm,primecell"; >> + reg = <0x6004000 0x1000>; >> + >> + qcom,tpda-atid = <65>; >> + >> + clocks = <&aoss_qmp>; >> + clock-names = "apb_pclk"; >> + >> + in-ports { >> + #address-cells = <1>; >> + #size-cells = <0>; >> + >> + port@0 { >> + reg = <0>; >> + tpda_qdss_0_in_tpdm_dcc: endpoint { >> + remote-endpoint = >> + <&tpdm_dcc_out_tpda_qdss_0>; >> + }; >> + }; >> + }; >> + >> + out-ports { >> + port { >> + tpda_qdss_out_funnel_in0: endpoint { >> + remote-endpoint = >> + <&funnel_in0_in_tpda_qdss>; >> + }; >> + }; >> + }; >> + }; >> + >> +... >> -- >> 2.17.1 >> > > -- > Mike Leach > Principal Engineer, ARM Ltd. > Manchester Design Centre. UK