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[220.133.187.190]) by smtp.gmail.com with ESMTPSA id k12sm3313947pfg.177.2020.05.20.21.43.16 (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Wed, 20 May 2020 21:43:18 -0700 (PDT) Content-Type: text/plain; charset=us-ascii Mime-Version: 1.0 (Mac OS X Mail 13.4 \(3608.80.23.2.2\)) Subject: Re: [PATCH] HID: intel-ish-hid: Replace PCI_DEV_FLAGS_NO_D3 with pci_save_state From: Kai-Heng Feng In-Reply-To: Date: Thu, 21 May 2020 12:43:15 +0800 Cc: "Rafael J. Wysocki" , Jiri Kosina , Benjamin Tissoires , Zhang Lixu , Even Xu , Alexios Zavras , Thomas Gleixner , Song Hongyan , "open list:INTEL INTEGRATED SENSOR HUB DRIVER" , open list Content-Transfer-Encoding: 8BIT Message-Id: <7E88D4A8-8056-4E12-8B2C-27307A7C5E7D@canonical.com> References: <20200505131730.22118-1-kai.heng.feng@canonical.com> To: Srinivas Pandruvada X-Mailer: Apple Mail (2.3608.80.23.2.2) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Srinivas, > On May 9, 2020, at 01:45, Srinivas Pandruvada wrote: > > On Tue, 2020-05-05 at 21:17 +0800, Kai-Heng Feng wrote: >> PCI_DEV_FLAGS_NO_D3 should not be used outside of PCI core. >> >> Instead, we can use pci_save_state() to hint PCI core that the device >> should stay at D0 during suspend. > > Your changes are doing more than just changing the flag. Can you > explain more about the other changes? By using pci_save_state(), in addition to keep itself stay at D0, the parent bridge will also stay at D0. So it's a better approach to achieve the same thing. > Also make sure that you test on both platforms which has regular S3 and > S0ix (modern standby system). Actually I don't have any physical hardware to test the patch, I found the issue when I search for D3 quirks through the source code. Can you guys do a quick smoketest for this patch? Kai-Heng > > Thanks, > Srinivas > > >> >> Signed-off-by: Kai-Heng Feng >> --- >> drivers/hid/intel-ish-hid/ipc/pci-ish.c | 15 ++++++++++----- >> 1 file changed, 10 insertions(+), 5 deletions(-) >> >> diff --git a/drivers/hid/intel-ish-hid/ipc/pci-ish.c >> b/drivers/hid/intel-ish-hid/ipc/pci-ish.c >> index f491d8b4e24c..ab588b9c8d09 100644 >> --- a/drivers/hid/intel-ish-hid/ipc/pci-ish.c >> +++ b/drivers/hid/intel-ish-hid/ipc/pci-ish.c >> @@ -106,6 +106,11 @@ static inline bool ish_should_enter_d0i3(struct >> pci_dev *pdev) >> return !pm_suspend_via_firmware() || pdev->device == >> CHV_DEVICE_ID; >> } >> >> +static inline bool ish_should_leave_d0i3(struct pci_dev *pdev) >> +{ >> + return !pm_resume_via_firmware() || pdev->device == >> CHV_DEVICE_ID; >> +} >> + >> /** >> * ish_probe() - PCI driver probe callback >> * @pdev: pci device >> @@ -215,9 +220,7 @@ static void __maybe_unused >> ish_resume_handler(struct work_struct *work) >> struct ishtp_device *dev = pci_get_drvdata(pdev); >> int ret; >> >> - /* Check the NO_D3 flag to distinguish the resume paths */ >> - if (pdev->dev_flags & PCI_DEV_FLAGS_NO_D3) { >> - pdev->dev_flags &= ~PCI_DEV_FLAGS_NO_D3; >> + if (ish_should_leave_d0i3(pdev) && !dev->suspend_flag) { >> disable_irq_wake(pdev->irq); >> >> ishtp_send_resume(dev); >> @@ -281,8 +284,10 @@ static int __maybe_unused ish_suspend(struct >> device *device) >> */ >> ish_disable_dma(dev); >> } else { >> - /* Set the NO_D3 flag, the ISH would enter D0i3 >> */ >> - pdev->dev_flags |= PCI_DEV_FLAGS_NO_D3; >> + /* Save state so PCI core will keep the device >> at D0, >> + * the ISH would enter D0i3 >> + */ >> + pci_save_state(pdev); >> > Did you test on some C > > >> enable_irq_wake(pdev->irq); >> }