From: "Hawkins, Nick" <nick.hawkins@hpe.com>
To: Andy Shevchenko <andy.shevchenko@gmail.com>
Cc: "Verdun, Jean-Marie" <verdun@hpe.com>,
"linus.walleij@linaro.org" <linus.walleij@linaro.org>,
"brgl@bgdev.pl" <brgl@bgdev.pl>,
"robh+dt@kernel.org" <robh+dt@kernel.org>,
"krzysztof.kozlowski+dt@linaro.org"
<krzysztof.kozlowski+dt@linaro.org>,
"jdelvare@suse.com" <jdelvare@suse.com>,
"linux@roeck-us.net" <linux@roeck-us.net>,
"linux-gpio@vger.kernel.org" <linux-gpio@vger.kernel.org>,
"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"linux-hwmon@vger.kernel.org" <linux-hwmon@vger.kernel.org>
Subject: Re: [PATCH v3 2/5] gpio: gxp: Add HPE GXP GPIO
Date: Wed, 7 Jun 2023 20:45:26 +0000 [thread overview]
Message-ID: <7FEECBB4-482E-4719-94CA-6D10E4C08078@hpe.com> (raw)
In-Reply-To: <CAHp75VeZkLSTw8OFmDMYb+im0qK0NQRHpndzBM7fMHm=HZCzeA@mail.gmail.com>
> It does care about things the average GPIO controller driver needs to
> repeat. So at least you may try and see how it will look.
> > If gpio_regmap is required, how do I create a direct correlation
> > between a specific gpio-line and a register offset? For example, in
> > gpio-gxp-pl.c. Gpio-line at offset 0 (IOPLED) is at register 0x04. The
> > gpio-line at offset 8 (FAN_INST) is at register 0x27.
> You may remap registers. See, for example, gpio-pca953x, where some of
> the registers (with high bit set) are actually virtual rather than
> real offsets. Similar idea can be used in your case.
Greetings Andy,
Is there any documents available describing how regmap_gpio
populates the GPIO lines? Does it automatically go through and add lines
for each successful regmap_read and bits per byte?
I have taken your advice and used the additional readable and writeable
on regmap_config to limit the number of accessible registers.
static const struct regmap_config gxp_regmap_config = {
.reg_bits = 8,
.reg_stride = 1,
.val_bits = 8,
.readable_reg = gxp_readable_register,
.writeable_reg = gxp_writeable_register,
.max_register = 0x80,
.name = "gxp-gpio-pl",
};
static const struct regmap_config gxp_int_regmap_config = {
.reg_bits = 8,
.reg_stride = 1,
.val_bits = 8,
.readable_reg = gxp_read_write_int_register,
.writeable_reg = gxp_read_write_int_register,
.max_register = 0x7f
.name = "gxp-gpio-pl-int"
};
Thanks,
-Nick Hawkins
next prev parent reply other threads:[~2023-06-07 20:46 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-06-06 1:42 [PATCH v3 0/5] ARM: Add GPIO support nick.hawkins
2023-06-06 1:42 ` [PATCH v3 1/5] dt-bindings: gpio: Add HPE GXP GPIO nick.hawkins
2023-06-06 9:30 ` Krzysztof Kozlowski
2023-06-06 1:42 ` [PATCH v3 2/5] gpio: gxp: " nick.hawkins
2023-06-06 9:22 ` andy.shevchenko
2023-06-06 18:51 ` Hawkins, Nick
2023-06-06 21:15 ` Andy Shevchenko
2023-06-07 16:07 ` Hawkins, Nick
2023-06-07 16:30 ` Andy Shevchenko
2023-06-07 20:45 ` Hawkins, Nick [this message]
2023-06-08 10:22 ` Andy Shevchenko
2023-06-08 14:58 ` Hawkins, Nick
2023-06-08 17:15 ` Andy Shevchenko
2023-06-06 1:42 ` [PATCH v3 3/5] dt-bindings: hwmon: hpe,gxp-fan-ctrl: remove fn2 and pl registers nick.hawkins
2023-06-06 9:30 ` Krzysztof Kozlowski
2023-06-06 1:42 ` [PATCH v3 4/5] hwmon: (gxp_fan_ctrl) Provide fan info via gpio nick.hawkins
2023-06-06 14:18 ` Guenter Roeck
2023-06-07 16:18 ` Hawkins, Nick
2023-06-06 1:42 ` [PATCH v3 5/5] MAINTAINERS: hpe: Add GPIO nick.hawkins
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