From: Suzuki K Poulose <Suzuki.Poulose@arm.com>
To: Julien Thierry <julien.thierry@arm.com>,
linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org, rob.walker@arm.com,
mike.leach@linaro.org, coresight@lists.linaro.org,
mathieu.poirier@linaro.org
Subject: Re: [PATCH 05/17] coresight: Add support for TMC ETR SG unit
Date: Wed, 1 Nov 2017 10:11:48 +0000 [thread overview]
Message-ID: <7b96683f-e1cf-b7d0-9bd9-956e3a33cdb6@arm.com> (raw)
In-Reply-To: <d365437e-3612-c3ef-59ad-f4048daf088e@arm.com>
>> diff --git a/drivers/hwtracing/coresight/coresight-tmc-etr.c b/drivers/hwtracing/coresight/coresight-tmc-etr.c
>> index 4b9e2b276122..4424eb67a54c 100644
>> --- a/drivers/hwtracing/coresight/coresight-tmc-etr.c
>> +++ b/drivers/hwtracing/coresight/coresight-tmc-etr.c
>> @@ -21,6 +21,89 @@
>> #include "coresight-tmc.h"
>> /*
>> + * The TMC ETR SG has a page size of 4K. The SG table contains pointers
>> + * to 4KB buffers. However, the OS may be use PAGE_SIZE different from
>
> nit:
> "the OS may use a PAGE_SIZE different from".
>
>> +#define ETR_SG_PAGE_SHIFT 12
>> +#define ETR_SG_PAGE_SIZE (1UL << ETR_SG_PAGE_SHIFT)
>> +#define ETR_SG_PAGES_PER_SYSPAGE (1UL << \
>> + (PAGE_SHIFT - ETR_SG_PAGE_SHIFT))
>
> I think this would be slightly easier to understand if defined as:
> "(PAGE_SIZE / ETR_SG_PAGE_SIZE)".
>
>> +/* Dump the given sg_table */
>> +static void tmc_etr_sg_table_dump(struct etr_sg_table *etr_table)
>> +{
>> + sgte_t *ptr;
>> + int i = 0;
>> + dma_addr_t addr;
>> + struct tmc_sg_table *sg_table = etr_table->sg_table;
>> +
>> + ptr = (sgte_t *)tmc_sg_daddr_to_vaddr(sg_table,
>> + etr_table->hwaddr, true);
>> + while (ptr) {
>> + addr = ETR_SG_ADDR(*ptr);
>> + switch (ETR_SG_ET(*ptr)) {
>> + case ETR_SG_ET_NORMAL:
>> + pr_debug("%05d: %p\t:[N] 0x%llx\n", i, ptr, addr);
>> + ptr++;
>> + break;
>> + case ETR_SG_ET_LINK:
>> + pr_debug("%05d: *** %p\t:{L} 0x%llx ***\n",
>> + i, ptr, addr);
>> + ptr = (sgte_t *)tmc_sg_daddr_to_vaddr(sg_table,
>> + addr, true);
>> + break;
>> + case ETR_SG_ET_LAST:
>> + pr_debug("%05d: ### %p\t:[L] 0x%llx ###\n",
>> + i, ptr, addr);
>> + return;
>
> I get this is debug code, but it seems like if ETR_SG_ET(*ptr) is 0 we get stuck in an infinite loop. I guess it is something that supposedly doesn't happen, still I'd prefer having a default case saying the table might be corrupted and either incrementing ptr to try and get more info or breaking out of the loop.
>
>> + }
>> + i++;
>> + }
>> + pr_debug("******* End of Table *****\n");
>> +}
>> +#endif
>> +
>> +/*
>> + * Populate the SG Table page table entries from table/data
>> + * pages allocated. Each Data page has ETR_SG_PAGES_PER_SYSPAGE SG pages.
>> + * So does a Table page. So we keep track of indices of the tables
>> + * in each system page and move the pointers accordingly.
>> + */
>> +#define INC_IDX_ROUND(idx, size) (idx = (idx + 1) % size)
>
> Needs more parenthesis around idx and size.
>
>> +static void tmc_etr_sg_table_populate(struct etr_sg_table *etr_table)
>> +{
>> + dma_addr_t paddr;
>> + int i, type, nr_entries;
>> + int tpidx = 0; /* index to the current system table_page */
>> + int sgtidx = 0; /* index to the sg_table within the current syspage */
>> + int sgtoffset = 0; /* offset to the next entry within the sg_table */
>
> That's misleading, this seems to be the index of an entry within an ETR_SG_PAGE rather than an offset in bytes.
>
> Maybe ptridx or entryidx would be a better name.
You're right, I have chosen sgtentry for now.
Thanks for the detailed look, I will fix all of them.
Cheers
Suzuki
next prev parent reply other threads:[~2017-11-01 10:12 UTC|newest]
Thread overview: 56+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-10-19 17:15 [PATCH 00/17] coresight: perf: TMC ETR backend support Suzuki K Poulose
2017-10-19 17:15 ` [PATCH 01/17] coresight etr: Disallow perf mode temporarily Suzuki K Poulose
2017-10-19 17:15 ` [PATCH 02/17] coresight tmc: Hide trace buffer handling for file read Suzuki K Poulose
2017-10-20 12:34 ` Julien Thierry
2017-11-01 9:55 ` Suzuki K Poulose
2017-10-19 17:15 ` [PATCH 03/17] coresight: Add helper for inserting synchronization packets Suzuki K Poulose
2017-10-30 21:44 ` Mathieu Poirier
2017-11-01 10:01 ` Suzuki K Poulose
2017-10-19 17:15 ` [PATCH 04/17] coresight: Add generic TMC sg table framework Suzuki K Poulose
2017-10-31 22:13 ` Mathieu Poirier
2017-11-01 10:09 ` Suzuki K Poulose
2017-10-19 17:15 ` [PATCH 05/17] coresight: Add support for TMC ETR SG unit Suzuki K Poulose
2017-10-20 16:25 ` Julien Thierry
2017-11-01 10:11 ` Suzuki K Poulose [this message]
2017-11-01 20:41 ` Mathieu Poirier
2017-10-19 17:15 ` [PATCH 06/17] coresight: tmc: Make ETR SG table circular Suzuki K Poulose
2017-10-20 17:11 ` Julien Thierry
2017-11-01 10:12 ` Suzuki K Poulose
2017-11-01 23:47 ` Mathieu Poirier
2017-11-02 12:00 ` Suzuki K Poulose
2017-11-02 14:40 ` Mathieu Poirier
2017-11-02 15:13 ` Russell King - ARM Linux
2017-11-06 19:07 ` Mathieu Poirier
2017-11-07 10:36 ` Suzuki K Poulose
2017-11-09 16:19 ` Mathieu Poirier
2017-10-19 17:15 ` [PATCH 07/17] coresight: tmc etr: Add transparent buffer management Suzuki K Poulose
2017-11-02 17:48 ` Mathieu Poirier
2017-11-03 10:02 ` Suzuki K Poulose
2017-11-03 20:13 ` Mathieu Poirier
2017-10-19 17:15 ` [PATCH 08/17] coresight: tmc: Add configuration support for trace buffer size Suzuki K Poulose
2017-11-02 19:26 ` Mathieu Poirier
2017-10-19 17:15 ` [PATCH 09/17] coresight: Convert driver messages to dev_dbg Suzuki K Poulose
2017-10-19 17:15 ` [PATCH 10/17] coresight: etr: Track if the device is coherent Suzuki K Poulose
2017-11-02 19:40 ` Mathieu Poirier
2017-11-03 10:03 ` Suzuki K Poulose
2017-10-19 17:15 ` [PATCH 11/17] coresight etr: Handle driver mode specific ETR buffers Suzuki K Poulose
2017-11-02 20:26 ` Mathieu Poirier
2017-11-03 10:08 ` Suzuki K Poulose
2017-11-03 20:30 ` Mathieu Poirier
2017-10-19 17:15 ` [PATCH 12/17] coresight etr: Relax collection of trace from sysfs mode Suzuki K Poulose
2017-10-19 17:15 ` [PATCH 13/17] coresight etr: Do not clean ETR trace buffer Suzuki K Poulose
2017-11-02 20:36 ` Mathieu Poirier
2017-11-03 10:10 ` Suzuki K Poulose
2017-11-03 20:17 ` Mathieu Poirier
2017-11-07 10:37 ` Suzuki K Poulose
2017-10-19 17:15 ` [PATCH 14/17] coresight: etr: Add support for save restore buffers Suzuki K Poulose
2017-11-03 22:22 ` Mathieu Poirier
2017-10-19 17:15 ` [PATCH 15/17] coresight: etr_buf: Add helper for padding an area of trace data Suzuki K Poulose
2017-10-19 17:15 ` [PATCH 16/17] coresight: perf: Remove reset_buffer call back for sinks Suzuki K Poulose
2017-11-06 21:10 ` Mathieu Poirier
2017-10-19 17:15 ` [PATCH 17/17] coresight perf: Add ETR backend support for etm-perf Suzuki K Poulose
2017-11-07 0:24 ` Mathieu Poirier
2017-11-07 10:52 ` Suzuki K Poulose
2017-11-07 15:17 ` Mike Leach
2017-11-07 15:46 ` Mathieu Poirier
2017-10-20 11:00 ` [PATCH 00/17] coresight: perf: TMC ETR backend support Suzuki K Poulose
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