From: Jianmin Lv <lvjianmin@loongson.cn>
To: Marc Zyngier <maz@kernel.org>
Cc: Thomas Gleixner <tglx@linutronix.de>,
linux-kernel@vger.kernel.org, loongarch@lists.linux.dev,
Jiaxun Yang <jiaxun.yang@flygoat.com>,
Huacai Chen <chenhuacai@loongson.cn>,
Bjorn Helgaas <bhelgaas@google.com>, Len Brown <lenb@kernel.org>,
rafael@kernel.org, linux-pci@vger.kernel.org,
linux-acpi@vger.kernel.org
Subject: Re: [PATCH V2 1/2] irqchip/loongson-pch-pic: Support to set irq type for ACPI path
Date: Sun, 9 Oct 2022 10:26:21 +0800 [thread overview]
Message-ID: <7d3894f9-9708-0b4f-b485-f167408feede@loongson.cn> (raw)
In-Reply-To: <87v8othkgz.wl-maz@kernel.org>
Ok, thanks, I'll separate this patch, so we have to make the patch
fixing PCI INTx handling to be after the patch supporting for the LPIC
model to avoid kernel hang, yes?
On 2022/10/9 上午9:08, Marc Zyngier wrote:
> On Sat, 08 Oct 2022 03:51:49 +0100,
> Jianmin Lv <lvjianmin@loongson.cn> wrote:
>>
>> For ACPI path, the translate callback used IRQ_TYPE_NONE and ignored
>> the irq type in fwspec->param[1]. For supporting to set type for
>> irqs of the irqdomain, fwspec->param[1] should be used to get irq
>> type.
>>
>> On Loongson platform, the irq trigger type of PCI devices is
>> high level, so high level triggered type is inputed to acpi_register_gsi
>> when create irq mapping for PCI devices.
>>
>> Signed-off-by: Jianmin Lv <lvjianmin@loongson.cn>
>> ---
>> drivers/acpi/pci_irq.c | 6 ++++--
>> drivers/irqchip/irq-loongson-pch-pic.c | 9 ++++++++-
>> 2 files changed, 12 insertions(+), 3 deletions(-)
>>
>> diff --git a/drivers/acpi/pci_irq.c b/drivers/acpi/pci_irq.c
>> index 08e15774fb9f..ff30ceca2203 100644
>> --- a/drivers/acpi/pci_irq.c
>> +++ b/drivers/acpi/pci_irq.c
>> @@ -387,13 +387,15 @@ int acpi_pci_irq_enable(struct pci_dev *dev)
>> u8 pin;
>> int triggering = ACPI_LEVEL_SENSITIVE;
>> /*
>> - * On ARM systems with the GIC interrupt model, level interrupts
>> + * On ARM systems with the GIC interrupt model, or LoongArch
>> + * systems with the LPIC interrupt model, level interrupts
>> * are always polarity high by specification; PCI legacy
>> * IRQs lines are inverted before reaching the interrupt
>> * controller and must therefore be considered active high
>> * as default.
>> */
>> - int polarity = acpi_irq_model == ACPI_IRQ_MODEL_GIC ?
>> + int polarity = acpi_irq_model == ACPI_IRQ_MODEL_GIC ||
>> + acpi_irq_model == ACPI_IRQ_MODEL_LPIC ?
>> ACPI_ACTIVE_HIGH : ACPI_ACTIVE_LOW;
>> char *link = NULL;
>> char link_desc[16];
>
> This is one patch adding support for the LPIC model.
>
>> diff --git a/drivers/irqchip/irq-loongson-pch-pic.c b/drivers/irqchip/irq-loongson-pch-pic.c
>> index c01b9c257005..5576c97fec85 100644
>> --- a/drivers/irqchip/irq-loongson-pch-pic.c
>> +++ b/drivers/irqchip/irq-loongson-pch-pic.c
>> @@ -159,11 +159,18 @@ static int pch_pic_domain_translate(struct irq_domain *d,
>> return -EINVAL;
>>
>> if (of_node) {
>> + if (fwspec->param_count < 2)
>> + return -EINVAL;
>> +
>
> This is another patch fixing a regression introduced by bcdd75c596c8.
>
>> *hwirq = fwspec->param[0] + priv->ht_vec_base;
>> *type = fwspec->param[1] & IRQ_TYPE_SENSE_MASK;
>> } else {
>> *hwirq = fwspec->param[0] - priv->gsi_base;
>> - *type = IRQ_TYPE_NONE;
>> +
>> + if (fwspec->param_count > 1)
>> + *type = fwspec->param[1] & IRQ_TYPE_SENSE_MASK;
>> + else
>> + *type = IRQ_TYPE_NONE;
>
> This is yet another patch fixing PCI INTx handling. You can also move
> the check against 'param_count < 1' in this block.
>
>> }
>>
>> return 0;
>
> M.
>
next prev parent reply other threads:[~2022-10-09 2:26 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-10-08 2:51 [PATCH V2 0/2] irqchip: Support to set irq type for ACPI path Jianmin Lv
2022-10-08 2:51 ` [PATCH V2 1/2] irqchip/loongson-pch-pic: " Jianmin Lv
2022-10-09 1:08 ` Marc Zyngier
2022-10-09 2:26 ` Jianmin Lv [this message]
2022-10-09 2:31 ` Marc Zyngier
2022-10-09 2:36 ` Jianmin Lv
2022-10-08 2:51 ` [PATCH V2 2/2] irqchip/loongson-liointc: " Jianmin Lv
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=7d3894f9-9708-0b4f-b485-f167408feede@loongson.cn \
--to=lvjianmin@loongson.cn \
--cc=bhelgaas@google.com \
--cc=chenhuacai@loongson.cn \
--cc=jiaxun.yang@flygoat.com \
--cc=lenb@kernel.org \
--cc=linux-acpi@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-pci@vger.kernel.org \
--cc=loongarch@lists.linux.dev \
--cc=maz@kernel.org \
--cc=rafael@kernel.org \
--cc=tglx@linutronix.de \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).