From: Sinan Kaya <okaya@kernel.org>
To: Bharat Kumar Gogada <bharat.kumar.gogada@xilinx.com>,
linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org
Cc: bhelgaas@google.com, rgummal@xilinx.com
Subject: Re: [PATCH 3/3] PCI/portdrv: Add support for sharing xilinx controller irq with AER
Date: Wed, 1 Aug 2018 11:05:09 -0700 [thread overview]
Message-ID: <7d5ae8ed-5623-3cd2-7769-77702448b2d6@kernel.org> (raw)
In-Reply-To: <1533141889-19962-4-git-send-email-bharat.kumar.gogada@xilinx.com>
On 8/1/2018 9:44 AM, Bharat Kumar Gogada wrote:
> Xilinx ZynqMP PS PCIe does not report AER interrupts using Advanced
> Error Interrupt Message Number. The controller has dedicated interrupt line
> for reporting PCIe errors along with AER.
>
> Using dedicated controller irq number for AER which is shared with misc
> interrupt handler in pcie-xilinx-nwl. This irq number is set
> using PCI quirk.
>
> Signed-off-by: Bharat Kumar Gogada<bharat.kumar.gogada@xilinx.com>
> ---
> drivers/pci/pcie/portdrv_core.c | 4 ++++
> 1 files changed, 4 insertions(+), 0 deletions(-)
>
> diff --git a/drivers/pci/pcie/portdrv_core.c b/drivers/pci/pcie/portdrv_core.c
> index e0261ad..fa9150e 100644
> --- a/drivers/pci/pcie/portdrv_core.c
> +++ b/drivers/pci/pcie/portdrv_core.c
> @@ -264,6 +264,10 @@ static int pcie_device_init(struct pci_dev *pdev, int service, int irq)
> int retval;
> struct pcie_device *pcie;
> struct device *device;
> +#if defined(CONFIG_ARCH_ZYNQMP) && defined(CONFIG_PCIE_XILINX_NWL)
> + if (service == PCIE_PORT_SERVICE_AER && pdev->sysdata)
> + irq = *(int *)pdev->sysdata;
> +#endif
>
I remember seeing a similar patch before. The patch above looks ugly to
be honest. Need to find a way to generalize this. Can you search the
mailing list archive to find out what the history is?
next prev parent reply other threads:[~2018-08-01 18:05 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-08-01 16:44 [PATCH 0/3] Use xilinx controller irq for AER handler Bharat Kumar Gogada
2018-08-01 16:44 ` [PATCH 1/3] PCI: xilinx-nwl: Save error IRQ number in device_node private data Bharat Kumar Gogada
2018-08-02 7:50 ` Christoph Hellwig
2018-08-01 16:44 ` [PATCH 2/3] PCI: Use dedicated Xilinx controller irq number for AER Bharat Kumar Gogada
2018-08-06 21:03 ` Bjorn Helgaas
2018-08-01 16:44 ` [PATCH 3/3] PCI/portdrv: Add support for sharing xilinx controller irq with AER Bharat Kumar Gogada
2018-08-01 18:05 ` Sinan Kaya [this message]
2018-08-06 20:56 ` Bjorn Helgaas
2018-08-06 21:24 ` Sinan Kaya
2018-08-07 13:19 ` Bharat Kumar Gogada
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