From: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
To: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: linuxarm@huawei.com, mauro.chehab@huawei.com,
Mauro Carvalho Chehab <mchehab+huawei@kernel.org>,
John Stultz <john.stultz@linaro.org>,
Manivannan Sadhasivam <mani@kernel.org>,
Daniel Vetter <daniel@ffwll.ch>,
dri-devel <dri-devel@lists.freedesktop.org>,
Wei Xu <xuwei5@hisilicon.com>, Rob Herring <robh+dt@kernel.org>,
linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org
Subject: [PATCH 45/49] dts: hikey970-pinctrl.dtsi: add missing pinctrl settings
Date: Wed, 19 Aug 2020 13:46:13 +0200 [thread overview]
Message-ID: <7e0450b87df8862852669d179eb9579b64fcf815.1597833138.git.mchehab+huawei@kernel.org> (raw)
In-Reply-To: <cover.1597833138.git.mchehab+huawei@kernel.org>
There are several pinctrl settings that are missing at this
DT file.
Also, the entries are out of order.
Add the missing bits, as they'll be required by the DRM driver - and
probably by other drivers not upstreamed yet.
Reorder the entres, adding the missing bits.
Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
---
.../boot/dts/hisilicon/hikey970-pinctrl.dtsi | 548 +++++++++++++++++-
1 file changed, 537 insertions(+), 11 deletions(-)
diff --git a/arch/arm64/boot/dts/hisilicon/hikey970-pinctrl.dtsi b/arch/arm64/boot/dts/hisilicon/hikey970-pinctrl.dtsi
index d456b0aa6f58..75723a1ad5ab 100644
--- a/arch/arm64/boot/dts/hisilicon/hikey970-pinctrl.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hikey970-pinctrl.dtsi
@@ -61,6 +61,153 @@ uart6_pmx_func: uart6_pmx_func {
0x060 MUX_M1 /* UART6_TXD */
>;
};
+
+ i2c3_pmx_func: i2c3_pmx_func {
+ pinctrl-single,pins = <
+ 0x010 MUX_M1 /* I2C3_SCL */
+ 0x014 MUX_M1 /* I2C3_SDA */
+ >;
+ };
+
+ i2c4_pmx_func: i2c4_pmx_func {
+ pinctrl-single,pins = <
+ 0x03c MUX_M1 /* I2C4_SCL */
+ 0x040 MUX_M1 /* I2C4_SDA */
+ >;
+ };
+
+ cam0_rst_pmx_func: cam0_rst_pmx_func {
+ pinctrl-single,pins = <
+ 0x714 MUX_M0 /* CAM0_RST */
+ >;
+ };
+
+ cam1_rst_pmx_func: cam1_rst_pmx_func {
+ pinctrl-single,pins = <
+ 0x048 MUX_M0 /* CAM1_RST */
+ >;
+ };
+
+ cam0_pwd_n_pmx_func: cam0_pwd_n_pmx_func {
+ pinctrl-single,pins = <
+ 0x098 MUX_M0 /* CAM0_PWD_N */
+ >;
+ };
+
+ cam1_pwd_n_pmx_func: cam1_pwd_n_pmx_func {
+ pinctrl-single,pins = <
+ 0x044 MUX_M0 /* CAM1_PWD_N */
+ >;
+ };
+
+ isp0_pmx_func: isp0_pmx_func {
+ pinctrl-single,pins = <
+ 0x018 MUX_M1 /* ISP_CLK0 */
+ 0x024 MUX_M1 /* ISP_SCL0 */
+ 0x028 MUX_M1 /* ISP_SDA0 */
+ >;
+ };
+
+ isp1_pmx_func: isp1_pmx_func {
+ pinctrl-single,pins = <
+ 0x01c MUX_M1 /* ISP_CLK1 */
+ 0x02c MUX_M1 /* ISP_SCL1 */
+ 0x030 MUX_M1 /* ISP_SDA1 */
+ >;
+ };
+ };
+
+ pmx1: pinmux@fff11000 {
+ compatible = "pinctrl-single";
+ reg = <0x0 0xfff11000 0x0 0x73c>;
+ #gpio-range-cells = <0x3>;
+ #pinctrl-cells = <1>;
+ pinctrl-single,register-width = <0x20>;
+ pinctrl-single,function-mask = <0x7>;
+ /* pin base, nr pins & gpio function */
+ pinctrl-single,gpio-range = <&range 0 46 0>;
+
+ pwr_key_pmx_func: pwr_key_pmx_func {
+ pinctrl-single,pins = <
+ 0x064 MUX_M0 /* GPIO_203 */
+ >;
+ };
+
+ pd_pmx_func: pd_pmx_func{
+ pinctrl-single,pins = <
+ 0x080 MUX_M0 /* GPIO_221 */
+ >;
+ };
+
+ i2s2_pmx_func: i2s2_pmx_func {
+ pinctrl-single,pins = <
+ 0x050 MUX_M1 /* I2S2_DI */
+ 0x054 MUX_M1 /* I2S2_DO */
+ 0x058 MUX_M1 /* I2S2_XCLK */
+ 0x05c MUX_M1 /* I2S2_XFS */
+ >;
+ };
+
+ spi0_pmx_func: spi0_pmx_func {
+ pinctrl-single,pins = <
+ 0x094 MUX_M1 /* SPI0_CLK */
+ 0x098 MUX_M1 /* SPI0_DI */
+ 0x09c MUX_M1 /* SPI0_DO */
+ 0x0a0 MUX_M1 /* SPI0_CS0_N */
+ >;
+ };
+
+ spi2_pmx_func: spi2_pmx_func {
+ pinctrl-single,pins = <
+ 0x710 MUX_M1 /* SPI2_CLK */
+ 0x714 MUX_M1 /* SPI2_DI */
+ 0x718 MUX_M1 /* SPI2_DO */
+ 0x71c MUX_M1 /* SPI2_CS0_N */
+ >;
+ };
+
+ spi3_pmx_func: spi3_pmx_func {
+ pinctrl-single,pins = <
+ 0x72c MUX_M1 /* SPI3_CLK */
+ 0x730 MUX_M1 /* SPI3_DI */
+ 0x734 MUX_M1 /* SPI3_DO */
+ 0x738 MUX_M1 /* SPI3_CS0_N */
+ >;
+ };
+
+ i2c0_pmx_func: i2c0_pmx_func {
+ pinctrl-single,pins = <
+ 0x020 MUX_M1 /* I2C0_SCL */
+ 0x024 MUX_M1 /* I2C0_SDA */
+ >;
+ };
+
+ i2c1_pmx_func: i2c1_pmx_func {
+ pinctrl-single,pins = <
+ 0x028 MUX_M1 /* I2C1_SCL */
+ 0x02c MUX_M1 /* I2C1_SDA */
+ >;
+ };
+ i2c2_pmx_func: i2c2_pmx_func {
+ pinctrl-single,pins = <
+ 0x030 MUX_M1 /* I2C2_SCL */
+ 0x034 MUX_M1 /* I2C2_SDA */
+ >;
+ };
+
+ pcie_clkreq_pmx_func: pcie_clkreq_pmx_func {
+ pinctrl-single,pins = <
+ 0x084 MUX_M1 /* PCIE0_CLKREQ_N */
+ >;
+ };
+
+ gpio185_pmx_func: gpio185_pmx_func {
+ pinctrl-single,pins = <0x01C 0x1>;
+ };
+
+ gpio185_pmx_idle: gpio185_pmx_idle {
+ pinctrl-single,pins = <0x01C 0x0>;
+ };
};
pmx2: pinmux@e896c800 {
@@ -184,6 +331,108 @@ PULL_UP
DRIVE7_02MA DRIVE6_MASK
>;
};
+
+ i2c3_cfg_func: i2c3_cfg_func {
+ pinctrl-single,pins = <
+ 0x014 0x0 /* I2C3_SCL */
+ 0x018 0x0 /* I2C3_SDA */
+ >;
+ pinctrl-single,bias-pulldown = <
+ PULL_DIS
+ PULL_DOWN
+ PULL_DIS
+ PULL_DOWN
+ >;
+ pinctrl-single,bias-pullup = <
+ PULL_DIS
+ PULL_UP
+ PULL_DIS
+ PULL_UP
+ >;
+ pinctrl-single,drive-strength = <
+ DRIVE7_04MA DRIVE6_MASK
+ >;
+ };
+
+ i2c4_cfg_func: i2c4_cfg_func {
+ pinctrl-single,pins = <
+ 0x040 0x0 /* I2C4_SCL */
+ 0x044 0x0 /* I2C4_SDA */
+ >;
+ pinctrl-single,bias-pulldown = <
+ PULL_DIS
+ PULL_DOWN
+ PULL_DIS
+ PULL_DOWN
+ >;
+ pinctrl-single,bias-pullup = <
+ PULL_DIS
+ PULL_UP
+ PULL_DIS
+ PULL_UP
+ >;
+ pinctrl-single,drive-strength = <
+ DRIVE7_04MA DRIVE6_MASK
+ >;
+ };
+
+ cam0_rst_cfg_func: cam0_rst_cfg_func {
+ pinctrl-single,pins = <
+ 0x714 0x0 /* CAM0_RST */
+ >;
+ pinctrl-single,bias-pulldown = <PULL_DIS PULL_DOWN PULL_DIS PULL_DOWN>;
+ pinctrl-single,bias-pullup = <PULL_DIS PULL_UP PULL_DIS PULL_UP>;
+ pinctrl-single,drive-strength = <DRIVE7_04MA DRIVE6_MASK>;
+ };
+
+ cam1_rst_cfg_func: cam1_rst_cfg_func {
+ pinctrl-single,pins = <
+ 0x04C 0x0 /* CAM1_RST */
+ >;
+ pinctrl-single,bias-pulldown = <PULL_DIS PULL_DOWN PULL_DIS PULL_DOWN>;
+ pinctrl-single,bias-pullup = <PULL_DIS PULL_UP PULL_DIS PULL_UP>;
+ pinctrl-single,drive-strength = <DRIVE7_04MA DRIVE6_MASK>;
+ };
+
+ cam0_pwd_n_cfg_func: cam0_pwd_n_cfg_func {
+ pinctrl-single,pins = <
+ 0x09C 0x0 /* CAM0_PWD_N */
+ >;
+ pinctrl-single,bias-pulldown = <PULL_DIS PULL_DOWN PULL_DIS PULL_DOWN>;
+ pinctrl-single,bias-pullup = <PULL_DIS PULL_UP PULL_DIS PULL_UP>;
+ pinctrl-single,drive-strength = <DRIVE7_04MA DRIVE6_MASK>;
+ };
+
+ cam1_pwd_n_cfg_func: cam1_pwd_n_cfg_func {
+ pinctrl-single,pins = <
+ 0x048 0x0 /* CAM1_PWD_N */
+ >;
+ pinctrl-single,bias-pulldown = <PULL_DIS PULL_DOWN PULL_DIS PULL_DOWN>;
+ pinctrl-single,bias-pullup = <PULL_DIS PULL_UP PULL_DIS PULL_UP>;
+ pinctrl-single,drive-strength = <DRIVE7_04MA DRIVE6_MASK>;
+ };
+
+ isp0_cfg_func: isp0_cfg_func {
+ pinctrl-single,pins = <
+ 0x01C 0x0 /* ISP_CLK0 */
+ 0x028 0x0 /* ISP_SCL0 */
+ 0x02C 0x0 /* ISP_SDA0 */
+ >;
+ pinctrl-single,bias-pulldown = <PULL_DIS PULL_DOWN PULL_DIS PULL_DOWN>;
+ pinctrl-single,bias-pullup = <PULL_DIS PULL_UP PULL_DIS PULL_UP>;
+ pinctrl-single,drive-strength = <DRIVE7_04MA DRIVE6_MASK>;
+ };
+
+ isp1_cfg_func: isp1_cfg_func {
+ pinctrl-single,pins = <
+ 0x020 0x0 /* ISP_CLK1 */
+ 0x030 0x0 /* ISP_SCL1 */
+ 0x034 0x0 /* ISP_SDA1 */
+ >;
+ pinctrl-single,bias-pulldown = <PULL_DIS PULL_DOWN PULL_DIS PULL_DOWN>;
+ pinctrl-single,bias-pullup = <PULL_DIS PULL_UP PULL_DIS PULL_UP>;
+ pinctrl-single,drive-strength = <DRIVE7_04MA DRIVE6_MASK>;
+ };
};
pmx5: pinmux@fc182000 {
@@ -338,22 +587,299 @@ DRIVE6_MASK
};
};
- pmx1: pinmux@fff11000 {
- compatible = "pinctrl-single";
- reg = <0x0 0xfff11000 0x0 0x73c>;
- #gpio-range-cells = <0x3>;
- #pinctrl-cells = <1>;
- pinctrl-single,register-width = <0x20>;
- pinctrl-single,function-mask = <0x7>;
- /* pin base, nr pins & gpio function */
- pinctrl-single,gpio-range = <&range 0 46 0>;
- };
-
pmx16: pinmux@fff11800 {
compatible = "pinconf-single";
reg = <0x0 0xfff11800 0x0 0x73c>;
#pinctrl-cells = <1>;
pinctrl-single,register-width = <0x20>;
+
+ pwr_key_cfg_func: pwr_key_cfg_func {
+ pinctrl-single,pins = <
+ 0x090 0x0 /* GPIO_203 */
+ >;
+ pinctrl-single,bias-pulldown = <PULL_DIS PULL_DOWN PULL_DIS PULL_DOWN>;
+ pinctrl-single,bias-pullup = <PULL_UP PULL_UP PULL_DIS PULL_UP>;
+ pinctrl-single,drive-strength = <DRIVE7_02MA DRIVE6_MASK>;
+ };
+
+ usb_cfg_func: usb_cfg_func {
+ pinctrl-single,pins = <
+ 0x0AC 0x0 /* GPIO_221 */
+ >;
+ pinctrl-single,bias-pulldown = <
+ PULL_DIS
+ PULL_DOWN
+ PULL_DIS
+ PULL_DOWN
+ >;
+ pinctrl-single,bias-pullup = <
+ PULL_UP
+ PULL_UP
+ PULL_DIS
+ PULL_UP
+ >;
+ pinctrl-single,drive-strength = <
+ DRIVE7_02MA DRIVE6_MASK
+ >;
+ };
+
+ spi0_cfg_func: spi0_cfg_func {
+ pinctrl-single,pins = <
+ 0x0c8 0x0 /* SPI0_DI */
+ 0x0cc 0x0 /* SPI0_DO */
+ 0x0d0 0x0 /* SPI0_CS0_N */
+ >;
+ pinctrl-single,bias-pulldown = <
+ PULL_DIS
+ PULL_DOWN
+ PULL_DIS
+ PULL_DOWN
+ >;
+ pinctrl-single,bias-pullup = <
+ PULL_DIS
+ PULL_UP
+ PULL_DIS
+ PULL_UP
+ >;
+ pinctrl-single,drive-strength = <
+ DRIVE7_06MA DRIVE6_MASK
+ >;
+ };
+
+ spi2_cfg_func: spi2_cfg_func {
+ pinctrl-single,pins = <
+ 0x714 0x0 /* SPI2_DI */
+ 0x718 0x0 /* SPI2_DO */
+ 0x71c 0x0 /* SPI2_CS0_N */
+ >;
+ pinctrl-single,bias-pulldown = <
+ PULL_DIS
+ PULL_DOWN
+ PULL_DIS
+ PULL_DOWN
+ >;
+ pinctrl-single,bias-pullup = <
+ PULL_DIS
+ PULL_UP
+ PULL_DIS
+ PULL_UP
+ >;
+ pinctrl-single,drive-strength = <
+ DRIVE7_06MA DRIVE6_MASK
+ >;
+ };
+
+ spi3_cfg_func: spi3_cfg_func {
+ pinctrl-single,pins = <
+ 0x730 0x0 /* SPI3_DI */
+ 0x734 0x0 /* SPI3_DO */
+ 0x738 0x0 /* SPI3_CS0_N */
+ >;
+ pinctrl-single,bias-pulldown = <
+ PULL_DIS
+ PULL_DOWN
+ PULL_DIS
+ PULL_DOWN
+ >;
+ pinctrl-single,bias-pullup = <
+ PULL_DIS
+ PULL_UP
+ PULL_DIS
+ PULL_UP
+ >;
+ pinctrl-single,drive-strength = <
+ DRIVE7_06MA DRIVE6_MASK
+ >;
+ };
+
+ spi0_clk_cfg_func: spi0_clk_cfg_func {
+ pinctrl-single,pins = <
+ 0x0c4 0x0 /* SPI0_CLK */
+ >;
+ pinctrl-single,bias-pulldown = <
+ PULL_DIS
+ PULL_DOWN
+ PULL_DIS
+ PULL_DOWN
+ >;
+ pinctrl-single,bias-pullup = <
+ PULL_DIS
+ PULL_UP
+ PULL_DIS
+ PULL_UP
+ >;
+ pinctrl-single,drive-strength = <
+ DRIVE7_10MA DRIVE6_MASK
+ >;
+ };
+
+ spi2_clk_cfg_func: spi2_clk_cfg_func {
+ pinctrl-single,pins = <
+ 0x710 0x0 /* SPI2_CLK */
+ >;
+ pinctrl-single,bias-pulldown = <
+ PULL_DIS
+ PULL_DOWN
+ PULL_DIS
+ PULL_DOWN
+ >;
+ pinctrl-single,bias-pullup = <
+ PULL_DIS
+ PULL_UP
+ PULL_DIS
+ PULL_UP
+ >;
+ pinctrl-single,drive-strength = <
+ DRIVE7_10MA DRIVE6_MASK
+ >;
+ };
+
+ spi3_clk_cfg_func: spi3_clk_cfg_func {
+ pinctrl-single,pins = <
+ 0x72c 0x0 /* SPI3_CLK */
+ >;
+ pinctrl-single,bias-pulldown = <
+ PULL_DIS
+ PULL_DOWN
+ PULL_DIS
+ PULL_DOWN
+ >;
+ pinctrl-single,bias-pullup = <
+ PULL_DIS
+ PULL_UP
+ PULL_DIS
+ PULL_UP
+ >;
+ pinctrl-single,drive-strength = <
+ DRIVE7_10MA DRIVE6_MASK
+ >;
+ };
+
+ i2c0_cfg_func: i2c0_cfg_func {
+ pinctrl-single,pins = <
+ 0x04c 0x0 /* I2C0_SCL */
+ 0x050 0x0 /* I2C0_SDA */
+ >;
+ pinctrl-single,bias-pulldown = <
+ PULL_DIS
+ PULL_DOWN
+ PULL_DIS
+ PULL_DOWN
+ >;
+ pinctrl-single,bias-pullup = <
+ PULL_DIS
+ PULL_UP
+ PULL_DIS
+ PULL_UP
+ >;
+ pinctrl-single,drive-strength = <
+ DRIVE7_04MA DRIVE6_MASK
+ >;
+ };
+
+ i2c1_cfg_func: i2c1_cfg_func {
+ pinctrl-single,pins = <
+ 0x054 0x0 /* I2C1_SCL */
+ 0x058 0x0 /* I2C1_SDA */
+ >;
+ pinctrl-single,bias-pulldown = <
+ PULL_DIS
+ PULL_DOWN
+ PULL_DIS
+ PULL_DOWN
+ >;
+ pinctrl-single,bias-pullup = <
+ PULL_DIS
+ PULL_UP
+ PULL_DIS
+ PULL_UP
+ >;
+ pinctrl-single,drive-strength = <
+ DRIVE7_04MA DRIVE6_MASK
+ >;
+ };
+
+ i2c2_cfg_func: i2c2_cfg_func {
+ pinctrl-single,pins = <
+ 0x05c 0x0 /* I2C2_SCL */
+ 0x060 0x0 /* I2C2_SDA */
+ >;
+ pinctrl-single,bias-pulldown = <
+ PULL_DIS
+ PULL_DOWN
+ PULL_DIS
+ PULL_DOWN
+ >;
+ pinctrl-single,bias-pullup = <
+ PULL_DIS
+ PULL_UP
+ PULL_DIS
+ PULL_UP
+ >;
+ pinctrl-single,drive-strength = <
+ DRIVE7_04MA DRIVE6_MASK
+ >;
+ };
+
+ pcie_clkreq_cfg_func: pcie_clkreq_cfg_func {
+ pinctrl-single,pins = <
+ 0x0b0 0x0
+ >;
+ pinctrl-single,bias-pulldown = <
+ PULL_DIS
+ PULL_DOWN
+ PULL_DIS
+ PULL_DOWN
+ >;
+ pinctrl-single,bias-pullup = <
+ PULL_DIS
+ PULL_UP
+ PULL_DIS
+ PULL_UP
+ >;
+ pinctrl-single,drive-strength = <
+ DRIVE7_06MA DRIVE6_MASK
+ >;
+ };
+ i2s2_cfg_func: i2s2_cfg_func {
+ pinctrl-single,pins = <
+ 0x07c 0x0 /* I2S2_DI */
+ 0x080 0x0 /* I2S2_DO */
+ 0x084 0x0 /* I2S2_XCLK */
+ 0x088 0x0 /* I2S2_XFS */
+ >;
+ pinctrl-single,bias-pulldown = <
+ PULL_DIS
+ PULL_DOWN
+ PULL_DIS
+ PULL_DOWN
+ >;
+ pinctrl-single,bias-pullup = <
+ PULL_UP
+ PULL_UP
+ PULL_DIS
+ PULL_UP
+ >;
+ pinctrl-single,drive-strength = <
+ DRIVE7_02MA DRIVE6_MASK
+ >;
+ };
+
+ gpio185_cfg_func: gpio185_cfg_func {
+ pinctrl-single,pins = <0x048 0>;
+ pinctrl-single,bias-pulldown = <0 2 0 2>;
+ pinctrl-single,bias-pullup = <0 1 0 1>;
+ pinctrl-single,drive-strength = <0x00 0x70>;
+ pinctrl-single,slew-rate = <0x0 0x80>;
+ };
+
+ gpio185_cfg_idle: gpio185_cfg_idle {
+ pinctrl-single,pins = <0x048 0>;
+ pinctrl-single,bias-pulldown = <2 2 0 2>;
+ pinctrl-single,bias-pullup = <0 1 0 1>;
+ pinctrl-single,drive-strength = <0x00 0x70>;
+ pinctrl-single,slew-rate = <0x0 0x80>;
+ };
};
};
};
--
2.26.2
next prev parent reply other threads:[~2020-08-19 11:57 UTC|newest]
Thread overview: 105+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-08-19 11:45 [PATCH 00/49] DRM driver for Hikey 970 Mauro Carvalho Chehab
2020-08-19 11:45 ` [PATCH 01/49] staging: hikey9xx: Add hisilicon DRM driver for hikey960/970 Mauro Carvalho Chehab
2020-08-19 11:45 ` [PATCH 02/49] staging: hikey9xx/gpu: port it to work with Kernel v4.9 Mauro Carvalho Chehab
2020-08-19 11:45 ` [PATCH 03/49] staging: hikey9xx/gpu: solve tearing issue of display Mauro Carvalho Chehab
2020-08-19 11:45 ` [PATCH 04/49] staging: hikey9xx/gpu: resolve the performance issue by interrupt mechanism Mauro Carvalho Chehab
2020-08-19 11:45 ` [PATCH 05/49] staging: hikey9xx/gpu: add support to hikey970 HDMI and panel Mauro Carvalho Chehab
2020-08-19 11:45 ` [PATCH 06/49] staging: hikey9xx/gpu: Solve SR Cannot Display Problems Mauro Carvalho Chehab
2020-08-19 11:45 ` [PATCH 07/49] staging: hikey9xx/gpu: Solve HDMI compatibility Problem Mauro Carvalho Chehab
2020-08-19 11:45 ` [PATCH 08/49] staging: hikey9xx/gpu: Support MIPI DSI 3 lanes for hikey970 Mauro Carvalho Chehab
2020-08-19 11:45 ` [PATCH 09/49] staging: hikey9xx/gpu: Solve SR test reset problem " Mauro Carvalho Chehab
2020-08-19 11:45 ` [PATCH 10/49] staging: hikey9xx/gpu: add debug prints for this driver Mauro Carvalho Chehab
2020-08-21 20:17 ` Joe Perches
2020-08-19 11:45 ` [PATCH 11/49] staging: hikey9xx/gpu: Add support 10.1 inch special HDMI displays Mauro Carvalho Chehab
2020-08-19 11:45 ` [PATCH 12/49] staging: hikey9xx/gpu: get rid of adv7535 fork Mauro Carvalho Chehab
2020-08-19 11:45 ` [PATCH 13/49] staging: hikey9xx/gpu: rename the Kirin9xx namespace Mauro Carvalho Chehab
2020-08-19 11:45 ` [PATCH 14/49] staging: hikey9xx/gpu: get rid of kirin9xx_fbdev.c Mauro Carvalho Chehab
2020-08-19 11:45 ` [PATCH 15/49] staging: hikey9xx/gpu: get rid of some ifdefs Mauro Carvalho Chehab
2020-08-19 11:45 ` [PATCH 16/49] staging: hikey9xx/gpu: rename the config option for Kirin970 Mauro Carvalho Chehab
2020-08-19 11:45 ` [PATCH 17/49] staging: hikey9xx/gpu: change the includes to reflect upstream Mauro Carvalho Chehab
2020-08-19 11:45 ` [PATCH 18/49] staging: hikey9xx/gpu: port driver to upstream kAPIs Mauro Carvalho Chehab
2020-08-19 11:45 ` [PATCH 19/49] staging: hikey9xx/gpu: add a copy of set_reg() function there Mauro Carvalho Chehab
2020-08-19 11:45 ` [PATCH 20/49] staging: hikey9xx/gpu: get rid of ION headers Mauro Carvalho Chehab
2020-08-19 11:45 ` [PATCH 21/49] staging: hikey9xx/gpu: add support for using a reserved CMA memory Mauro Carvalho Chehab
2020-08-19 11:45 ` [PATCH 22/49] staging: hikey9xx/gpu: cleanup encoder attach logic Mauro Carvalho Chehab
2020-08-19 11:45 ` [PATCH 23/49] staging: hikey9xx/gpu: Change the logic which sets the burst mode Mauro Carvalho Chehab
2020-08-19 11:45 ` [PATCH 24/49] staging: hikey9xx/gpu: fix the DRM setting logic Mauro Carvalho Chehab
2020-08-19 11:45 ` [PATCH 25/49] staging: hikey9xx/gpu: do some code cleanups Mauro Carvalho Chehab
2020-08-20 1:53 ` John Stultz
2020-08-20 8:23 ` Mauro Carvalho Chehab
2020-08-21 20:12 ` John Stultz
2020-08-19 11:45 ` [PATCH 26/49] staging: hikey9xx/gpu: use default GEM_CMA fops Mauro Carvalho Chehab
2020-08-19 11:45 ` [PATCH 27/49] staging: hikey9xx/gpu: place vblank enable/disable at the right place Mauro Carvalho Chehab
2020-08-19 11:45 ` [PATCH 28/49] staging: hikey9xx/gpu: remove an uneeded hack Mauro Carvalho Chehab
2020-08-19 11:45 ` [PATCH 29/49] staging: hikey9xx/gpu: add a possible implementation for atomic_disable Mauro Carvalho Chehab
2020-08-19 11:45 ` [PATCH 30/49] staging: hikey9xx/gpu: register connector Mauro Carvalho Chehab
2020-08-19 11:45 ` [PATCH 31/49] staging: hikey9xx/gpu: fix driver name Mauro Carvalho Chehab
2020-08-19 11:46 ` [PATCH 32/49] staging: hikey9xx/gpu: get rid of iommu_format Mauro Carvalho Chehab
2020-08-19 11:46 ` [PATCH 33/49] staging: hikey9xx/gpu: re-work the mode validation code Mauro Carvalho Chehab
2020-08-19 11:46 ` [PATCH 34/49] staging: hikey9xx/gpu: add support for enable/disable ldo3 regulator Mauro Carvalho Chehab
2020-08-19 11:46 ` [PATCH 35/49] staging: hikey9xx/gpu: add SPMI headers Mauro Carvalho Chehab
2020-08-19 11:46 ` [PATCH 36/49] staging: hikey9xx/gpu: solve most coding style issues Mauro Carvalho Chehab
2020-08-19 11:46 ` [PATCH 37/49] staging: hikey9xx/gpu: don't use iommu code Mauro Carvalho Chehab
2020-08-19 11:46 ` [PATCH 38/49] staging: hikey9xx/gpu: add kirin9xx driver to the building system Mauro Carvalho Chehab
2020-08-19 15:30 ` Randy Dunlap
2020-08-19 11:46 ` [PATCH 39/49] staging: hikey9xx/gpu: get rid of typedefs Mauro Carvalho Chehab
2020-08-19 11:46 ` [PATCH 40/49] staging: hikey9xx/gpu: get rid of input/output macros Mauro Carvalho Chehab
2020-08-19 11:46 ` [PATCH 41/49] staging: hikey9xx/gpu: get rid of some unused data Mauro Carvalho Chehab
2020-08-19 11:46 ` [PATCH 42/49] staging: hikey9xx/gpu: place common definitions at kirin9xx_dpe.h Mauro Carvalho Chehab
2020-08-19 11:46 ` [PATCH 43/49] staging: hikey9xx/gpu: get rid of DRM_HISI_KIRIN970 Mauro Carvalho Chehab
2020-08-19 11:46 ` [PATCH 44/49] dts: hisilicon: hi3670.dtsi: add I2C settings Mauro Carvalho Chehab
2020-08-19 11:46 ` Mauro Carvalho Chehab [this message]
2020-08-19 11:46 ` [PATCH 46/49] dt: hisilicon: add support for the PMIC found on Hikey 970 Mauro Carvalho Chehab
2020-08-19 11:46 ` [PATCH 47/49] dts: add support for Hikey 970 DRM Mauro Carvalho Chehab
2020-08-19 11:46 ` [PATCH 48/49] staging: hikey9xx/gpu: drop kirin9xx_pwm Mauro Carvalho Chehab
2020-08-19 11:46 ` [PATCH 49/49] dt: display: Add binds for the DPE and DSI controller for Kirin 960/970 Mauro Carvalho Chehab
2020-08-19 21:02 ` Sam Ravnborg
2020-08-19 22:36 ` Rob Herring
2020-08-19 15:21 ` [PATCH 00/49] DRM driver for Hikey 970 Sam Ravnborg
2020-08-19 15:30 ` Laurent Pinchart
2020-08-19 19:52 ` John Stultz
2020-08-20 7:03 ` Mauro Carvalho Chehab
2020-08-20 10:02 ` Laurent Pinchart
2020-08-24 19:29 ` Dave Airlie
2020-08-25 11:30 ` Mauro Carvalho Chehab
2020-08-25 11:38 ` Laurent Pinchart
2020-08-25 12:31 ` Daniel Stone
2020-08-26 14:44 ` Nicolas Dufresne
2020-08-19 15:40 ` Mauro Carvalho Chehab
2020-08-19 17:35 ` Sam Ravnborg
2020-08-20 14:06 ` Mauro Carvalho Chehab
2020-08-20 14:48 ` Sam Ravnborg
2020-08-20 15:13 ` Mauro Carvalho Chehab
2020-08-20 15:36 ` Sam Ravnborg
2020-08-21 13:37 ` Mauro Carvalho Chehab
2020-08-21 13:58 ` Mauro Carvalho Chehab
2020-08-21 15:55 ` Sam Ravnborg
2020-08-24 16:02 ` Mauro Carvalho Chehab
2020-08-24 18:45 ` Sam Ravnborg
2020-08-24 21:10 ` Sam Ravnborg
2020-08-24 21:24 ` Sam Ravnborg
2020-08-25 18:11 ` Sam Ravnborg
2020-08-25 20:21 ` Sam Ravnborg
2020-08-21 14:41 ` Mauro Carvalho Chehab
2020-08-21 15:56 ` Sam Ravnborg
2020-08-24 16:06 ` Mauro Carvalho Chehab
2020-08-19 20:48 ` Sam Ravnborg
2020-08-20 7:21 ` Michel Dänzer
2020-08-20 7:21 ` Mauro Carvalho Chehab
2020-08-21 16:09 ` Joe Perches
2020-08-19 21:13 ` John Stultz
2020-08-19 21:25 ` Sam Ravnborg
2020-08-20 6:40 ` Mauro Carvalho Chehab
2020-08-20 6:34 ` Mauro Carvalho Chehab
2020-08-19 21:36 ` John Stultz
2020-08-20 2:01 ` John Stultz
2020-08-20 3:28 ` John Stultz
2020-08-20 7:48 ` Mauro Carvalho Chehab
2020-08-24 6:49 ` Mauro Carvalho Chehab
2020-08-24 13:18 ` Mauro Carvalho Chehab
2020-08-20 8:04 ` Mauro Carvalho Chehab
2020-08-20 3:39 ` [PATCH 1/3] drm: hikey9xx: Fix inconsistent compat string John Stultz
2020-08-20 3:40 ` [PATCH 2/3] drm: kirin9xxx: Add additional color formats John Stultz
2020-08-20 3:41 ` [PATCH 3/3] drm: hikey9xxx: Fix null pointer crash on reboot John Stultz
2020-08-20 3:56 ` [PATCH 4/3] drm: hikey9xx: remove wait for VACTIVE IRQ John Stultz
2020-08-20 9:04 ` [PATCH 1/3] drm: hikey9xx: Fix inconsistent compat string Mauro Carvalho Chehab
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