From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-13.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 71443C63777 for ; Mon, 30 Nov 2020 21:24:06 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 149B02073C for ; Mon, 30 Nov 2020 21:24:06 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=mg.codeaurora.org header.i=@mg.codeaurora.org header.b="TV5NAamg" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2388526AbgK3VYF (ORCPT ); Mon, 30 Nov 2020 16:24:05 -0500 Received: from m42-4.mailgun.net ([69.72.42.4]:22030 "EHLO m42-4.mailgun.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729334AbgK3VYF (ORCPT ); Mon, 30 Nov 2020 16:24:05 -0500 DKIM-Signature: a=rsa-sha256; v=1; c=relaxed/relaxed; d=mg.codeaurora.org; q=dns/txt; s=smtp; t=1606771425; h=Message-ID: References: In-Reply-To: Subject: Cc: To: From: Date: Content-Transfer-Encoding: Content-Type: MIME-Version: Sender; bh=dbZGdUcFmNG53loMl2JmT/iUQISOLMxPK14YsDoFSQ4=; b=TV5NAamgZU64y2TjKPyBWC8Wk0QDLZmL1wyWJJlwQItGxWij4QPtmvDbIBWbAp3swl8JtHTP +CVCXWBIoiS40VtDq+aN2tbzwM9e5Jya2SmzFy32P8IyIPTvi1gNdBfdg/br+E03u+MYk3ES bO26U4M4VuRbyqwcwmZii5nqHWM= X-Mailgun-Sending-Ip: 69.72.42.4 X-Mailgun-Sid: WyI0MWYwYSIsICJsaW51eC1rZXJuZWxAdmdlci5rZXJuZWwub3JnIiwgImJlOWU0YSJd Received: from smtp.codeaurora.org (ec2-35-166-182-171.us-west-2.compute.amazonaws.com [35.166.182.171]) by smtp-out-n06.prod.us-east-1.postgun.com with SMTP id 5fc562c6f4482b01c4c5a4c7 (version=TLS1.2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256); Mon, 30 Nov 2020 21:23:18 GMT Sender: abhinavk=codeaurora.org@mg.codeaurora.org Received: by smtp.codeaurora.org (Postfix, from userid 1001) id A839FC43460; Mon, 30 Nov 2020 21:23:17 +0000 (UTC) Received: from mail.codeaurora.org (localhost.localdomain [127.0.0.1]) (using TLSv1 with cipher ECDHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) (Authenticated sender: abhinavk) by smtp.codeaurora.org (Postfix) with ESMTPSA id 1DE4BC433ED; Mon, 30 Nov 2020 21:23:17 +0000 (UTC) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII; format=flowed Content-Transfer-Encoding: 7bit Date: Mon, 30 Nov 2020 13:23:17 -0800 From: abhinavk@codeaurora.org To: Lee Jones Cc: freedreno@lists.freedesktop.org, Shubhashree Dhar , David Airlie , linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, Sean Paul Subject: Re: [PATCH 15/40] drm/msm/disp/dpu1/dpu_hw_interrupts: Demote kernel-doc formatting misuse In-Reply-To: <20201126134240.3214176-16-lee.jones@linaro.org> References: <20201126134240.3214176-1-lee.jones@linaro.org> <20201126134240.3214176-16-lee.jones@linaro.org> Message-ID: <7ecb21f6b65de4014b2bbe9dcc5762a0@codeaurora.org> X-Sender: abhinavk@codeaurora.org User-Agent: Roundcube Webmail/1.3.9 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 2020-11-26 05:42, Lee Jones wrote: > Fixes the following W=1 kernel build warning(s): > > drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c:246: error: Cannot > parse struct or union! > drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c:756: error: Cannot > parse struct or union! > > Cc: Rob Clark > Cc: Sean Paul > Cc: David Airlie > Cc: Daniel Vetter > Cc: Shubhashree Dhar > Cc: linux-arm-msm@vger.kernel.org > Cc: dri-devel@lists.freedesktop.org > Cc: freedreno@lists.freedesktop.org > Signed-off-by: Lee Jones Reviewed-by: Abhinav Kumar > --- > drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c > b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c > index 38482b1047745..5c521de715670 100644 > --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c > +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c > @@ -189,7 +189,7 @@ struct dpu_irq_type { > u32 reg_idx; > }; > > -/** > +/* > * struct dpu_intr_reg - List of DPU interrupt registers > */ > static const struct dpu_intr_reg dpu_intr_set[] = { > @@ -245,7 +245,7 @@ static const struct dpu_intr_reg dpu_intr_set[] = { > } > }; > > -/** > +/* > * struct dpu_irq_type - IRQ mapping table use for lookup an irq_idx > in this > * table that have a matching interface type and > * instance index.