From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S935153AbcKNR2W (ORCPT ); Mon, 14 Nov 2016 12:28:22 -0500 Received: from mail-pf0-f180.google.com ([209.85.192.180]:36810 "EHLO mail-pf0-f180.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S935059AbcKNR2Q (ORCPT ); Mon, 14 Nov 2016 12:28:16 -0500 From: Kevin Hilman To: Neil Armstrong Cc: carlo@caione.org, linux-amlogic@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Subject: Re: [PATCH 0/3] ARM64: dts: meson-gxl: Enable Ethernet Organization: BayLibre References: <20161107104357.24428-1-narmstrong@baylibre.com> Date: Mon, 14 Nov 2016 09:28:13 -0800 In-Reply-To: <20161107104357.24428-1-narmstrong@baylibre.com> (Neil Armstrong's message of "Mon, 7 Nov 2016 11:43:54 +0100") Message-ID: <7h60nq7yz6.fsf@baylibre.com> User-Agent: Gnus/5.13 (Gnus v5.13) Emacs/24.5 (gnu/linux) MIME-Version: 1.0 Content-Type: text/plain Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Neil Armstrong writes: > The Amlogic Meson GXL SoCs have an internal RMII PHY that is muxed with the > external RGMII pins. > > The internal PHY is added in the GXL dtsi and support for each > board is added in intermediate board family dtsi or final dts. Tested external phy and internal phy (using p231 DT) on my p230 board. Applied to v4.10/dt64 Kevin