From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753908AbbFIPni (ORCPT ); Tue, 9 Jun 2015 11:43:38 -0400 Received: from mail-pd0-f172.google.com ([209.85.192.172]:35689 "EHLO mail-pd0-f172.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752630AbbFIPnc (ORCPT ); Tue, 9 Jun 2015 11:43:32 -0400 From: Kevin Hilman To: Peter Griffin Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, srinivas.kandagatla@gmail.com, patrice.chotard@st.com, maxime.coquelin@st.com, arnd@arndb.de, olof@lixom.net, lee.jones@linaro.org, devicetree@vger.kernel.org Subject: Re: [PATCH v2 0/3] Add code to release secondary cores from holding pen. References: <1433856824-30689-1-git-send-email-peter.griffin@linaro.org> Date: Tue, 09 Jun 2015 08:43:28 -0700 In-Reply-To: <1433856824-30689-1-git-send-email-peter.griffin@linaro.org> (Peter Griffin's message of "Tue, 9 Jun 2015 14:33:41 +0100") Message-ID: <7hd214sx9b.fsf@deeprootsystems.com> User-Agent: Gnus/5.13 (Gnus v5.13) Emacs/24.3 (gnu/linux) MIME-Version: 1.0 Content-Type: text/plain Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Peter Griffin writes: > Hi Maxime, Patrice, Srini, Kevin, Olof & Arnd, > > This patchset adds in the necessary code to manage the holding pen for STi > platforms. > > Due to all the STi upstream devs using JTAG to boot the STi boards, there > is currently a SMP bug when booting upstream kernels via u-boot where > only the primary core is brought up. > > This hasn't been noticed until now because when booting via JTAG the > stlinux_arm_boot script sets the PC of the secondary cores directly. > > With these patches applied booting via u-boot now works correctly. > > [ 0.045456] CPU: Testing write buffer coherency: ok > [ 0.045597] CPU0: thread -1, cpu 0, socket 0, mpidr 80000000 > [ 0.045734] Setting up static identity map for 0x40209000 - 0x40209098 > [ 0.065047] CPU1: thread -1, cpu 1, socket 0, mpidr 80000001 > [ 0.065081] Brought up 2 CPUs > [ 0.065089] SMP: Total of 2 processors activated (5983.43 BogoMIPS). > [ 0.065092] CPU: All CPU(s) started in SVC mode. > > Kevin / Olof / Arnd - Can you put this fix into the next ARM SoC fixes pull > request (if there is one)? At this stage of the cycle (we're already at -rc7) we limit things to strictly regression fixes, and seems this has been broken for some time, so I think this will have to wait for v4.2. After addresing the comments, Maxime should queue this up for arm-soc so we can get it in early in the v4.2-rc cycle. Kevin