From: Zhenyu Ye <yezhenyu2@huawei.com>
To: Will Deacon <will@kernel.org>
Cc: Catalin Marinas <catalin.marinas@arm.com>,
<aneesh.kumar@linux.ibm.com>, Marc Zyngier <maz@kernel.org>,
<steven.price@arm.com>, Peter Zijlstra <peterz@infradead.org>,
<linux-arm-kernel@lists.infradead.org>,
<linux-kernel@vger.kernel.org>, <linux-arch@vger.kernel.org>,
<linux-mm@kvack.org>, Xiexiangyou <xiexiangyou@huawei.com>,
<liushixin2@huawei.com>, huyaqin <huyaqin1@huawei.com>,
<zhurui3@huawei.com>
Subject: Re: [PATCH v1] arm64: tlb: fix the TTL value of tlb_get_level
Date: Thu, 24 Jun 2021 09:55:53 +0800 [thread overview]
Message-ID: <800c06ad-1491-c5ba-c650-c78384bf50c9@huawei.com> (raw)
In-Reply-To: <20210623110412.GA32177@willie-the-truck>
On 2021/6/23 19:04, Will Deacon wrote:
> On Wed, Jun 23, 2021 at 03:05:22PM +0800, Zhenyu Ye wrote:
>> diff --git a/arch/arm64/include/asm/tlb.h b/arch/arm64/include/asm/tlb.h
>> index 61c97d3b58c7..c995d1f4594f 100644
>> --- a/arch/arm64/include/asm/tlb.h
>> +++ b/arch/arm64/include/asm/tlb.h
>> @@ -28,6 +28,10 @@ static void tlb_flush(struct mmu_gather *tlb);
>> */
>> static inline int tlb_get_level(struct mmu_gather *tlb)
>> {
>> + /* The TTL field is only valid for the leaf entry. */
>> + if (tlb->freed_tables)
>> + return 0;
>> +
>> if (tlb->cleared_ptes && !(tlb->cleared_pmds ||
>> tlb->cleared_puds ||
>> tlb->cleared_p4ds))
>
> Thanks. I can't see a better way around this, so I'll queue the patch.
> The stage-2 page-table code looks ok afaict, but please can you check it
> too?
The stage-2 page-table codes seem to be correct to me.
Thanks,
Zhenyu
next prev parent reply other threads:[~2021-06-24 1:56 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-06-23 7:05 [PATCH v1] arm64: tlb: fix the TTL value of tlb_get_level Zhenyu Ye
2021-06-23 11:04 ` Will Deacon
2021-06-23 11:28 ` Catalin Marinas
2021-06-24 1:55 ` Zhenyu Ye [this message]
2021-06-24 8:29 ` Will Deacon
2021-06-23 14:00 ` Will Deacon
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