linux-kernel.vger.kernel.org archive mirror
 help / color / mirror / Atom feed
From: Nicolas Ferre <nicolas.ferre@microchip.com>
To: Peter Rosin <peda@axentia.se>, <Claudiu.Beznea@microchip.com>,
	<clement.leger@bootlin.com>, <regressions@leemhuis.info>
Cc: <alexandre.belloni@bootlin.com>, <linux@armlinux.org.uk>,
	<linux-arm-kernel@lists.infradead.org>,
	<linux-kernel@vger.kernel.org>, <regressions@lists.linux.dev>
Subject: Re: [PATCH] ARM: at91: fix build for SAMA5D3 w/o L2 cache
Date: Wed, 23 Nov 2022 11:40:53 +0100	[thread overview]
Message-ID: <83198642-2ef7-a12a-2ad4-5839b465c085@microchip.com> (raw)
In-Reply-To: <f3ee38ad-61b0-1069-9000-4d125d3bfa25@axentia.se>

On 23/11/2022 at 09:38, Peter Rosin wrote:
> Hi!
> 
> 2022-11-23 at 08:19, Claudiu.Beznea@microchip.com wrote:
>> On 22.11.2022 19:14, Clément Léger wrote:
>>> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
>>>
>>> Le Tue, 22 Nov 2022 16:13:40 +0100,
>>> Thorsten Leemhuis <regressions@leemhuis.info> a écrit :
>>>
>>>> Hi, this is your Linux kernel regression tracker.
>>>>
>>>> On 12.11.22 16:40, Peter Rosin wrote:
>>>>> The L2 cache is present on the newer SAMA5D2 and SAMA5D4 families, but
>>>>> apparently not for the older SAMA5D3. At least not always.
>>
>> Peter, what do you mean by "at least not always" here? Are you talking
>> about the OUTER_CACHE flag?
> 
> I'm not familiar with all options for L2 caching. I was just being cautious
> to not exclude the possibility that there could be some variation within
> the SAMA5D3 series (I'm on SAMA5D31) or with an external L2 cache or
> something such. If there's simply no possible way to have an L2 cache on
> any SAMA5D3, feel free to edit that "At least not always" out while you
> commit.

I confirm that there is no L2 cache in any variant of SAMA5D3.

[..]

Thanks, best regards,
   Nicolas
-- 
Nicolas Ferre


  reply	other threads:[~2022-11-23 10:53 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-11-12 15:40 [PATCH] ARM: at91: fix build for SAMA5D3 w/o L2 cache Peter Rosin
2022-11-18 21:38 ` Peter Rosin
2022-11-22 15:13 ` Thorsten Leemhuis
2022-11-22 17:14   ` Clément Léger
2022-11-23  7:19     ` Claudiu.Beznea
2022-11-23  8:38       ` Peter Rosin
2022-11-23 10:40         ` Nicolas Ferre [this message]
2022-11-24 10:52 ` Claudiu.Beznea

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=83198642-2ef7-a12a-2ad4-5839b465c085@microchip.com \
    --to=nicolas.ferre@microchip.com \
    --cc=Claudiu.Beznea@microchip.com \
    --cc=alexandre.belloni@bootlin.com \
    --cc=clement.leger@bootlin.com \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux@armlinux.org.uk \
    --cc=peda@axentia.se \
    --cc=regressions@leemhuis.info \
    --cc=regressions@lists.linux.dev \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).