From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754799AbcL0MNF (ORCPT ); Tue, 27 Dec 2016 07:13:05 -0500 Received: from us01smtprelay-2.synopsys.com ([198.182.60.111]:52741 "EHLO smtprelay.synopsys.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754679AbcL0MM6 (ORCPT ); Tue, 27 Dec 2016 07:12:58 -0500 Subject: Re: [PATCH] net: stmmac: fix incorrect bit set in gmac4 mdio addr register To: "Kweh, Hock Leong" , "David S. Miller" , Joao Pinto , "Giuseppe CAVALLARO" , , References: <1482869261-23803-1-git-send-email-hock.leong.kweh@intel.com> CC: Alexandre TORGUE , Joachim Eastwood , Niklas Cassel , Johan Hovold , , Ong Boon Leong , , , netdev , LKML From: Joao Pinto Message-ID: <8361c024-3afe-f048-0cf6-d029d1a075d2@synopsys.com> Date: Tue, 27 Dec 2016 12:11:49 +0000 User-Agent: Mozilla/5.0 (Windows NT 10.0; WOW64; rv:45.0) Gecko/20100101 Thunderbird/45.5.1 MIME-Version: 1.0 In-Reply-To: <1482869261-23803-1-git-send-email-hock.leong.kweh@intel.com> Content-Type: text/plain; charset="windows-1252" Content-Transfer-Encoding: 8bit X-Originating-IP: [10.107.19.116] Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Ās 8:07 PM de 12/27/2016, Kweh, Hock Leong escreveu: > From: "Kweh, Hock Leong" > > Fixing the gmac4 mdio write access to use MII_GMAC4_WRITE only instead of > OR together with MII_WRITE. > > Signed-off-by: Kweh, Hock Leong > --- > drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c | 4 +++- > 1 file changed, 3 insertions(+), 1 deletion(-) > > diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c > index fda01f7..b0344c2 100644 > --- a/drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c > +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c > @@ -116,7 +116,7 @@ static int stmmac_mdio_write(struct mii_bus *bus, int phyaddr, int phyreg, > unsigned int mii_address = priv->hw->mii.addr; > unsigned int mii_data = priv->hw->mii.data; > > - u32 value = MII_WRITE | MII_BUSY; > + u32 value = MII_BUSY; > > value |= (phyaddr << priv->hw->mii.addr_shift) > & priv->hw->mii.addr_mask; > @@ -126,6 +126,8 @@ static int stmmac_mdio_write(struct mii_bus *bus, int phyaddr, int phyreg, > & priv->hw->mii.clk_csr_mask; > if (priv->plat->has_gmac4) > value |= MII_GMAC4_WRITE; > + else > + value |= MII_WRITE; > > /* Wait until any existing MII operation is complete */ > if (stmmac_mdio_busy_wait(priv->ioaddr, mii_address)) > Acked-By: Joao Pinto