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Tue, 23 Oct 2018 08:39:19 +0000 Received: from AM4PR08MB2788.eurprd08.prod.outlook.com ([fe80::11fa:6313:23e1:c943]) by AM4PR08MB2788.eurprd08.prod.outlook.com ([fe80::11fa:6313:23e1:c943%2]) with mapi id 15.20.1250.028; Tue, 23 Oct 2018 08:39:19 +0000 From: Ramana Radhakrishnan To: Will Deacon , Kristina Martsenko CC: "linux-arm-kernel@lists.infradead.org" , Adam Wallis , Amit Kachhap , Andrew Jones , Ard Biesheuvel , Arnd Bergmann , Catalin Marinas , Christoffer Dall , Dave P Martin , Jacob Bramley , Kees Cook , Marc Zyngier , Mark Rutland , Suzuki Poulose , "kvmarm@lists.cs.columbia.edu" , "linux-arch@vger.kernel.org" , "linux-kernel@vger.kernel.org" , nd Subject: Re: [PATCH 00/17] ARMv8.3 pointer authentication support Thread-Topic: [PATCH 00/17] ARMv8.3 pointer authentication support Thread-Index: AQHUXIhWBVNZY6Tx102sb5GXVKYZW6Uml7yAgAYG+IA= Date: Tue, 23 Oct 2018 08:39:19 +0000 Message-ID: <8478fc27-6e74-4fa6-7956-ffc1cca6c063@arm.com> References: <20181005084754.20950-1-kristina.martsenko@arm.com> <20181019123646.GG14246@arm.com> In-Reply-To: <20181019123646.GG14246@arm.com> Accept-Language: en-GB, en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: user-agent: Mozilla/5.0 (X11; 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received-spf: None (protection.outlook.com: arm.com does not designate permitted sender hosts) x-microsoft-antispam-message-info: TLrrwhedUKy8V8h2ptliWGTXrngEBAQSUgu8PqNycR0SmiGcu7/O3L1fIRsAV3vndELic3CkfTcOAVj51j+O/QxkMyLYazv1Yqr4YVkxKh7dt3EsKfElcRPo7fo1s1MFJi3rUexHDXcvPgrGow+ugK0sEg5njVEhG1sMnCVPJa0TuWLe2tiUhkJ+N2VVA7vNXQqjariq4UbhqlkHyHOzo7o6HtPEVi+H34XwmIx1GYQUh3daXXGPhjM8jUvCZRtoxEVCykmA5yleUC9Lq11g4h/IA5/3Mxj2GWc2yhcCCUSmxNXJKEjoV4XYBHg9cITs2gdUCrhhaMGy/HqiJQwV8Fgkb+gYpGYMiWwlKT9yI8M= spamdiagnosticoutput: 1:99 spamdiagnosticmetadata: NSPM Content-Type: text/plain; charset="Windows-1252" Content-ID: Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-Network-Message-Id: f2d1a9ba-f867-4687-4ac5-08d638c305f8 X-MS-Exchange-CrossTenant-originalarrivaltime: 23 Oct 2018 08:39:19.3502 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM4PR08MB2690 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 19/10/2018 13:36, Will Deacon wrote: > On Fri, Oct 05, 2018 at 09:47:37AM +0100, Kristina Martsenko wrote: >> 1) Key support >> >> This series enables the use of instructions using APIAKey, which is >> initialised and maintained per-process (shared by all threads). GCC >> currently only makes use of APIAKey. >> >> This series does not add support for APIBKey, APDAKey, APDBKey, nor >> APGAKey. HINT-space instructions using these keys will currently execute >> as NOPs. Support for these keys can be added as users appear. >> >> Note that while we expose the cpuid register (ID_AA64ISAR1_EL1) to >> userspace, it only contains one feature for address authentication >> (API/APA), so it cannot be used by userspace to tell which keys the >> kernel supports. For this the kernel exposes HWCAP bits, one per key >> (currently only APIAKey), which must be checked instead. >=20 > Given that the architecture doesn't provide an identification mechanism > for the case where only one of the keys is available, I would much prefer > that we expose both of the keys to userspace. Is the only downside of > that a possible exception entry overhead if the kernel wants to use point= er > authentication as well? >=20 > Having an initial implementation where the B key operations act as NOPs > isn't ideal if we want to support future users -- chances are they'll > be put off because deployed kernels don't give them whatever security > guarantees they require. It's a bit of a chicken-and-egg problem, so > unless we have good reasons to keep the B key hidden, I think we should > be exposing it from the start. There are patches in flight to get B key signing support in for GCC 9 -=20 so exposing this to user space will be good. Ramana >=20 > Will >=20